Position Overview IC Enable is seeking a motivated and detail-oriented Junior IC Layout Design Engineer to join our growing team in Richardson, Texas. This role is ideal for an early-career engineer ...
Position Overview IC Enable is seeking a motivated and detail-oriented Junior IC Layout Design Engineer to join our growing team in Richardson, Texas. This role is ideal for an early-career engineer ...
IC Layout Design Engineer
Richardson, TX ยท Hybrid
The team has an exciting opportunity for a IC Layout Design Engineer V to join our diverse team executing full-custom integrated circuit development with specific responsibility for driving the ...
IC Layout Design Engineer
Richardson, TX ยท Hybrid
The team has an exciting opportunity for a IC Layout Design Engineer V to join our diverse team executing full-custom integrated circuit development with specific responsibility for driving the ...
Layout Design Engineer
Austin, TX ยท On-site
Associates Degree in Electronic/IC layout CAD specialization or related program and 10+years of IC ... Proactively work with design engineers to achieve efficient circuit performance * Design analog ...
Layout Design Engineer
Austin, TX ยท On-site
Associates Degree in Electronic/IC layout CAD specialization or related program and 10+years of IC ... Proactively work with design engineers to achieve efficient circuit performance * Design analog ...
Analog/RF IC Layout Design Engineer.
Santa Clara, CA ยท On-site
$117K - $195K/yr
Assisting the design team with IC floorplanning, creating grid cells and other custom layouts * Coordinating layout activities with other layout engineers and contractors Complete chip level sign-off ...
Analog/RF IC Layout Design Engineer.
Santa Clara, CA ยท On-site
$117K - $195K/yr
Assisting the design team with IC floorplanning, creating grid cells and other custom layouts * Coordinating layout activities with other layout engineers and contractors Complete chip level sign-off ...
... chip design with advanced architectures and hardware accelerators with a goal of enhancing the ... As an Analog IC Layout Engineer, your responsibilities will include: * Crafting state-of-the-art ...
... chip design with advanced architectures and hardware accelerators with a goal of enhancing the ... As an Analog IC Layout Engineer, your responsibilities will include: * Crafting state-of-the-art ...
Analog/RF IC Layout Design Engineer.
Colorado Springs, CO ยท On-site
$117K - $195K/yr
Assisting the design team with IC floorplanning, creating grid cells and other custom layouts * Coordinating layout activities with other layout engineers and contractors Complete chip level sign-off ...
Analog/RF IC Layout Design Engineer.
Colorado Springs, CO ยท On-site
$117K - $195K/yr
Assisting the design team with IC floorplanning, creating grid cells and other custom layouts * Coordinating layout activities with other layout engineers and contractors Complete chip level sign-off ...
Analog/RF IC Layout Design Engineer.
Colorado Springs, CO ยท On-site
$117K - $195K/yr
Assisting the design team with IC floorplanning, creating grid cells and other custom layouts * Coordinating layout activities with other layout engineers and contractors Complete chip level sign-off ...
Analog/RF IC Layout Design Engineer.
Colorado Springs, CO ยท On-site
$117K - $195K/yr
Assisting the design team with IC floorplanning, creating grid cells and other custom layouts * Coordinating layout activities with other layout engineers and contractors Complete chip level sign-off ...
IC Layout Design
Greensboro, NC ยท On-site
For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal ... Solving layout design issues and applying proactive intervention * Proactively work with design ...
IC Layout Design
Greensboro, NC ยท On-site
For over four decades, Cirrus Logic has been propelled by the top engineers in mixed-signal ... Solving layout design issues and applying proactive intervention * Proactively work with design ...
Analog IC Layout Engineer
South San Francisco, CA ยท On-site
$83K - $139K/yr
Experience with layout P-cell design and implementation * Experience with layout automation ... Temporary Employees & Interns excluded
Analog IC Layout Engineer
South San Francisco, CA ยท On-site
$83K - $139K/yr
Experience with layout P-cell design and implementation * Experience with layout automation ... Temporary Employees & Interns excluded
Staff Layout Design Engineer
Raleigh, NC ยท On-site
$144K - $187K/yr
Associates Degree in Electronic/IC layout CAD specialization or related program and 10+ years of IC ... BSEE/BS Engineering Technology or related program * Comfortable with CMOS and SOI technologies ...
Staff Layout Design Engineer
Raleigh, NC ยท On-site
$144K - $187K/yr
Associates Degree in Electronic/IC layout CAD specialization or related program and 10+ years of IC ... BSEE/BS Engineering Technology or related program * Comfortable with CMOS and SOI technologies ...
Layout Engineer
Kirkland, WA ยท On-site +1
Familiar & understand CMOS and BiCMOS technology and IC Design principles. * Understanding of CAD ... design engineers and other layout designers. * Work both independently and within a team ...
Layout Engineer
Kirkland, WA ยท On-site +1
Familiar & understand CMOS and BiCMOS technology and IC Design principles. * Understanding of CAD ... design engineers and other layout designers. * Work both independently and within a team ...
The Layout Design Engineering group is an integral part of the Silicon Engineering department, working closely with the analog RFID end-point IC development team and the Reader IC team ...
Quick apply
The Layout Design Engineering group is an integral part of the Silicon Engineering department, working closely with the analog RFID end-point IC development team and the Reader IC team ...
The Layout Design Engineering group is an integral part of the Silicon Engineering department, working closely with the analog RFID end-point IC development team and the Reader IC team ...
The Layout Design Engineering group is an integral part of the Silicon Engineering department, working closely with the analog RFID end-point IC development team and the Reader IC team ...
Senior Staff Design Engineer, IC Layout
$158K - $238K/yr
The Layout Design Engineering group is an integral part of the Silicon Engineering department, working closely with the analog RFID end-point IC development team and the Reader IC team ...
Senior Staff Design Engineer, IC Layout
$158K - $238K/yr
The Layout Design Engineering group is an integral part of the Silicon Engineering department, working closely with the analog RFID end-point IC development team and the Reader IC team ...
Sr. Analog Physical Design Engineer
Santa Clara, CA ยท On-site
$156K - $160K/yr
Description Job Title: Sr. Analog Physical Design Engineer Job Duties: * Work on detailed column ... Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using ...
Sr. Analog Physical Design Engineer
Santa Clara, CA ยท On-site
$156K - $160K/yr
Description Job Title: Sr. Analog Physical Design Engineer Job Duties: * Work on detailed column ... Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using ...
Sr. Analog Physical Design Engineer
$156K - $160K/yr
Job Title: Sr. Analog Physical Design Engineer Job Duties: * Work on detailed column ADC circuit ... Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using ...
Sr. Analog Physical Design Engineer
$156K - $160K/yr
Job Title: Sr. Analog Physical Design Engineer Job Duties: * Work on detailed column ADC circuit ... Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using ...
Sr. Analog Physical Design Engineer
Santa Clara, CA ยท On-site
$156K - $160K/yr
Job Title: Sr. Analog Physical Design Engineer Job Duties: * Work on detailed column ADC circuit ... Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using ...
Sr. Analog Physical Design Engineer
Santa Clara, CA ยท On-site
$156K - $160K/yr
Job Title: Sr. Analog Physical Design Engineer Job Duties: * Work on detailed column ADC circuit ... Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using ...
Job Title: Sr. Analog Physical Design Engineer Job Duties: * Work on detailed column ADC circuit ... Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using ...
Quick apply
Job Title: Sr. Analog Physical Design Engineer Job Duties: * Work on detailed column ADC circuit ... Responsible for full-custom analog IC layout and physical verification (DRC/ANT/DFM/ERC/LVS) using ...
Layout Engineer
Kirkland, WA ยท On-site
Familiar & understand CMOS and BiCMOS technology and IC Design principles. * Understanding of CAD ... design engineers and other layout designers. * Work both independently and within a team ...
Layout Engineer
Kirkland, WA ยท On-site
Familiar & understand CMOS and BiCMOS technology and IC Design principles. * Understanding of CAD ... design engineers and other layout designers. * Work both independently and within a team ...
Substrate IC Package Layout Design Engineer
San Jose, CA ยท On-site
$2.0K/mo
Job Summary As a Substrate IC Package Layout Design Engineer you will be responsible for the end-to-end design of complex IC substrate packages, supporting high-power consumption and high-speed ...
Quick apply
Substrate IC Package Layout Design Engineer
San Jose, CA ยท On-site
$2.0K/mo
Job Summary As a Substrate IC Package Layout Design Engineer you will be responsible for the end-to-end design of complex IC substrate packages, supporting high-power consumption and high-speed ...
Internship Ic Layout Design Engineer information
See salary details
$6.73 - $8.26
2% of jobs
$8.26 - $9.79
3% of jobs
$9.79 - $11.32
2% of jobs
$11.32 - $12.85
3% of jobs
$12.85 - $14.38
8% of jobs
$14.67 is the 25th percentile. Wages below this are outliers.
$14.38 - $15.91
32% of jobs
$15.91 - $17.44
15% of jobs
$18.73 is the 75th percentile. Wages above this are outliers.
$17.44 - $18.97
12% of jobs
$18.97 - $20.50
15% of jobs
$20.50 - $22.03
7% of jobs
$22.03 - $23.56
1% of jobs
$6
$16
$23
How much do internship ic layout design engineer jobs pay per hour?
What is the difference between Internship Ic Layout Design Engineer vs IC Design Engineer?
| Aspect | Internship IC Layout Design Engineer | IC Design Engineer |
|---|---|---|
| Credentials | Typically pursuing or recently completed relevant degree; internship experience | Bachelor's or Master's in Electrical/Electronic Engineering; professional experience preferred |
| Work Environment | Internship programs, entry-level tasks, supervised environment | Full-time professional role, independent project work, team collaboration |
| Responsibilities | Assisting in layout design, learning design tools, supporting senior engineers | Designing, simulating, and verifying integrated circuit layouts independently |
In summary, an Internship IC Layout Design Engineer is a trainee gaining hands-on experience under supervision, while an IC Design Engineer is a full-time professional responsible for designing and verifying integrated circuits independently.
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For Internship Ic Layout Design Engineer jobs, the most frequently searched job titles are:
Junior IC Layout Design Engineer
Richardson, TX โข Hybrid
Full-time
Medical, Dental, Vision, Retirement
Re-posted yesterday
Key responsibilities
Support the layout and physical verification of analog, mixed-signal, RF, and custom digital circuits
Perform layout implementation while adhering to foundry design rules and project requirements
Assist with DRC, LVS, ERC, and other physical verification activities
Job description
- Richardson, TX (Hybrid; In Office 3 Days A Week)
- Minimum 1 year of experience in IC layout design and physical verification
- ITAR Compliance (U.S. Persons meaning U.S. Citizen or U.S. Green Card Holder)
- Experience using Cadence Virtuoso, VXL, or similar layout design tools
- Familiarity with physical verification tools such as Assura (DRC, LVS, ERC) or equivalent
- Basic understanding of analog, mixed-signal, or RF layout concepts
- Knowledge of matching techniques, shielding, guard rings, and latch-up prevention
- Strong analytical, troubleshooting, and problem-solving skills
- Ability to work effectively in a collaborative team environment
- Strong verbal and written communication skills
- Bachelor's degree in Electrical Engineering or a related field
- Exposure to scripting languages such as SKILL or PERL is a plus
- Experience with advanced process technologies, FinFET, or GAA is a plus but not required
- Support the layout and physical verification of analog, mixed-signal, RF, and custom digital circuits
- Perform layout implementation while adhering to foundry design rules and project requirements
- Assist with DRC, LVS, ERC, and other physical verification activities
- Collaborate with design engineers to optimize layouts for performance, area, reliability, and manufacturability
- Participate in design reviews and contribute to layout quality improvements
- Help identify and resolve layout and verification issues
- Learn and apply best practices for advanced IC layout methodologies
- Contribute to project schedules and deliverables while maintaining high-quality standards
- Support continuous improvement initiatives across design and layout processes
About IC Enable
Sourced by ZipRecruiter
Industry
Semiconductor and electronic component manufacturing
Company size
51 - 200 Employees
Headquarters location
Dallas, TX, US
Year founded
2004