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Internship Ic Layout Design Engineer Jobs (NOW HIRING)

Sr IC Digital Layout Designer

Redmond, WA · On-site

$130K - $160K/yr

Required Qualifications Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or related field. 7+ years of experience in digital IC layout design in advanced technology ...

Sr IC Digital Layout Designer

Irvine, CA · On-site

$130K - $160K/yr

Required Qualifications Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or related field. 7+ years of experience in digital IC layout design in advanced technology ...

CA · On-site

... design, routing channels, and macro assembly. · Carry out, debug, and complete DRC, LVS, ERC ... Have a BSEE or equivalent experience 10+ years of custom IC layout experience, including 5+ years ...

Principal IC Layout Engineer About the ATE Group: The Automatic Test Equipment (ATE) organization ... Physical design lead of high-speed and high-performance analog, mixed-signal, and digital products ...

Job Summary: We are seeking an experienced Senior Analog/Mixed-Signal Layout Design Engineer to ... Develop high-quality analog/mixed-signal IC layouts and create GDS databases of completed designs ...

Sr IC Digital Layout Designer

Irvine, CA · Hybrid

$130K - $160K/yr

Required Qualifications Bachelor's or Master's degree in Electrical Engineering, Electronics Engineering, or related field. 7+ years of experience in digital IC layout design in advanced technology ...

Under general supervision, take responsibility for specific subtasks such as block design, layout ... IC Design Engineer Level 2: * Bachelor's degree (or equivalent) with 2+ years of relevant IC design ...

New

... engineering specifications and expectations. -Use advanced CAD tools, mask design knowledge to layout corrections and robust physical design representation of circuits. Minimum Qualifications ...

... engineering specifications and expectations. -Use advanced CAD tools, mask design knowledge to layout corrections and robust physical design representation of circuits. Minimum Qualifications ...

Analog Layout Design Engineer Job location: Santa Clara, CA, 95054 Job Duration: 3 Months, Contract to Hire * Experience with layout of cutting-edge high-performance, high-speed CMOS integrated ...

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Internship Ic Layout Design Engineer information

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How much do internship ic layout design engineer jobs pay per hour?

As of Jul 12, 2026, the average hourly pay for internship ic layout design engineer in the United States is $16.33, according to ZipRecruiter salary data. Most workers in this role earn between $14.42 and $19.23 per hour, depending on experience, location, and employer.

What is the difference between Internship Ic Layout Design Engineer vs IC Design Engineer?

AspectInternship IC Layout Design EngineerIC Design Engineer
CredentialsTypically pursuing or recently completed relevant degree; internship experienceBachelor's or Master's in Electrical/Electronic Engineering; professional experience preferred
Work EnvironmentInternship programs, entry-level tasks, supervised environmentFull-time professional role, independent project work, team collaboration
ResponsibilitiesAssisting in layout design, learning design tools, supporting senior engineersDesigning, simulating, and verifying integrated circuit layouts independently

In summary, an Internship IC Layout Design Engineer is a trainee gaining hands-on experience under supervision, while an IC Design Engineer is a full-time professional responsible for designing and verifying integrated circuits independently.

What cities are hiring for Internship Ic Layout Design Engineer jobs? Cities with the most Internship Ic Layout Design Engineer job openings:
What are the most commonly searched types of Ic Layout Design Engineer jobs? The most popular types of Ic Layout Design Engineer jobs are:
What states have the most Internship Ic Layout Design Engineer jobs? States with the most job openings for Internship Ic Layout Design Engineer jobs include:
Senior Layout Design Engineer

Senior Layout Design Engineer

Xoriant Corporation

San Jose, CA • On-site

Other

Re-posted 13 days ago


Job description

Job Description:

Job Title: "Senior Layout Design Engineer"

Location: San Jose, CA (Onsite, 5 days a week)

Duration: Long Term

Description

Client is looking for a talent that has strong background and hands-on experience on RF/Analog circuit layout design. The candidate will be developing next-generation RF transceivers and mixed-signal circuits for wireless communication systems along with circuit designers.

Requirements

  • Associate and Bachelor's Degree with 10+ years of relevant industry experience in Electrical Engineering, Technical, or related field preferred.
  • Extensive experience in analog/mixed-signal layout design of deep submicron CMOS circuits and recent experience on advance nodes including FinFET technologies.
  • High level of proficiency in interpretation of CALIBRE DRC, ERC, LVS, reports.
  • Extensive experience in analog/RF related circuit layout, including LNA/PA/PLLs and etc.
  • High level of proficiency in CADENCE or MENTOR GRAPHICS layout tools.
  • Good communication skills with design leads as well as engineers for schedule planning.
  • Being able to lead a small group of layout engineers to deliver a successful tapeout.
  • Programming knowledge in SKILL, Perl, and/or Python is a bonus.
  • You re inclusive, adapting your style to the situation and diverse global norms of our people.
  • An avid learner, you approach challenges with curiosity and resilience, seeking data to help build understanding.
  • You re collaborative, building relationships, humbly offering support and openly welcoming approaches.
  • Innovative and creative, you proactively explore new ideas and adapt quickly to change.