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Junior Ic Layout Design Engineer Jobs in Texas (NOW HIRING)

IC Enable

IC Layout Design Engineer

Richardson, TX · Hybrid

The team has an exciting opportunity for a IC Layout Design Engineer V to join our diverse team ... This position is best suited for a junior-mid level engineer who is hungry, humble and smart and is ...

Cirrus Logic

Layout Design Engineer

Austin, TX · On-site

Associates Degree in Electronic/IC layout CAD specialization or related program and 10+years of IC ... Proactively work with design engineers to achieve efficient circuit performance * Design analog ...

Qorvo, Inc.

Staff Layout Design Engineer

Austin, TX · On-site

$144K - $187K/yr

Associates Degree in Electronic/IC layout CAD specialization or related program and 10+ years of IC ... BSEE/BS Engineering Technology or related program * Comfortable with CMOS and SOI technologies ...

Texas Instruments

Digital IC Design Engineer

Dallas, TX · On-site

$90 - $120/hr

Digital Design Engineer Change the world. Love your job. Texas Instruments is seeking a Digital ... Supervise IC layout of digital blocks to ensure timing, power, and signal integrity requirements ...

Apple

Digital Layout Design Engineer

Austin, TX · On-site

... engineering specifications and expectations. -Use advanced CAD tools, mask design knowledge to layout corrections and robust physical design representation of circuits. Minimum Qualifications ...

Apple

Digital Layout Design Engineer

Austin, TX · On-site

... engineering specifications and expectations. -Use advanced CAD tools, mask design knowledge to layout corrections and robust physical design representation of circuits. Minimum Qualifications ...

Socket.dev

Digital Layout Design Engineer

Austin, TX · On-site

$140 - $200/hr

Exceed engineering specifications and expectations. * Use advanced CAD tools, mask design knowledge to layout corrections and robust physical design representation of circuits. MINIMUM QUALIFICATIONS ...

Apple

Digital Layout Design Engineer

Austin, TX

$166K - $296K/yr

... design team to plan, schedule work and negotiate layout tradeoffs as needed. - Interpretation of LVS, DRC and ERC report to find the fastest way to complete layouts. - Exceed engineering ...

Apple

Digital Layout Design Engineer

Austin, TX

$137K - $250K/yr

... design team to plan, schedule work and negotiate layout tradeoffs as needed. - Interpretation of LVS, DRC and ERC report to find the fastest way to complete layouts. - Exceed engineering ...

Apple

Digital Layout Design Engineer

Austin, TX

$137K - $250K/yr

... design team to plan, schedule work and negotiate layout tradeoffs as needed. - Interpretation of LVS, DRC and ERC report to find the fastest way to complete layouts. - Exceed engineering ...

Apple

Digital Layout Design Engineer

Austin, TX

$166K - $296K/yr

... design team to plan, schedule work and negotiate layout tradeoffs as needed. - Interpretation of LVS, DRC and ERC report to find the fastest way to complete layouts. - Exceed engineering ...

Apple

Digital Layout Design Engineer

Austin, TX

$166K - $296K/yr

... design team to plan, schedule work and negotiate layout tradeoffs as needed. - Interpretation of LVS, DRC and ERC report to find the fastest way to complete layouts. - Exceed engineering ...

Apple

Digital Layout Design Engineer

Austin, TX

$137K - $250K/yr

... design team to plan, schedule work and negotiate layout tradeoffs as needed. - Interpretation of LVS, DRC and ERC report to find the fastest way to complete layouts. - Exceed engineering ...

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Junior Ic Layout Design Engineer information

What does a junior IC layout design engineer do?

A Junior IC Layout Design Engineer assists in the physical design of integrated circuits (ICs) by translating schematic diagrams into actual chip layouts using specialized CAD tools. Their responsibilities include placing and routing circuit components, ensuring adherence to design rules, verifying layouts for manufacturability, and collaborating with senior engineers to optimize performance and reliability. This entry-level position is essential for creating functional and efficient semiconductor chips used in various electronic devices.

What are some typical challenges faced by a junior IC layout design engineer during their first year on the job?

Junior IC Layout Design Engineers often encounter challenges such as learning to interpret complex circuit schematics, applying foundry-specific design rules, and mastering specialized EDA tools like Cadence Virtuoso. Additionally, collaborating efficiently with circuit designers and verification teams can be demanding as new engineers adjust to fast-paced project timelines and the need for high accuracy. However, with mentorship and hands-on experience, most junior engineers quickly build confidence and develop effective problem-solving skills.

What are the key skills and qualifications needed to thrive as a junior IC layout design engineer, and why are they important?

To thrive as a Junior IC Layout Design Engineer, a solid understanding of semiconductor physics, electronic circuits, and a relevant engineering degree are essential. Familiarity with EDA tools such as Cadence Virtuoso or Synopsys, and knowledge of design rule checking (DRC) and layout versus schematic (LVS) verification, are typically required. Attention to detail, problem-solving skills, and effective teamwork are important soft skills that help ensure high-quality layouts and collaboration with design teams. These competencies are crucial for producing reliable integrated circuit layouts that meet performance, manufacturability, and project deadlines.

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Junior Ic Layout Design Engineer jobs near you
Infographic showing various Junior Ic Layout Design Engineer job openings in Texas as of August 2026, with employment types broken down into 90% Full Time, 7% Part Time, and 3% Contract. Highlights an 82% Physical, 5% Hybrid, and 13% Remote job distribution.

Junior IC Layout Design Engineer

IC Enable

Richardson, TX • Hybrid

Full-time

Medical, Dental, Vision, Retirement

Re-posted 10 days ago

Job description

For over 20 years, IC Enable has successfully provided design IP, IC products, services, and platform solutions to demanding customers ranging from startups to Fortune 50 companies. Our design and product offerings focus on high-reliability mixed-signal and digital markets, while our platform solutions support IDMs, foundries, and IP providers.
Now is an exciting time to join our team as we continue to advance the semiconductor industry through technology development, full-custom ASIC/SoC design, and electronics development across the Semiconductor, Medical, and Defense industries. At IC Enable, you'll have the opportunity to work alongside experienced engineers on challenging projects while building your skills and growing your career.
Position Overview
IC Enable is seeking a motivated and detail-oriented Junior IC Layout Design Engineer to join our growing team in Richardson, Texas. This role is ideal for an early-career engineer with at least one year of industry experience who is eager to expand their knowledge of integrated circuit layout design and physical verification while contributing to innovative mixed-signal, analog, and digital IC development projects.
Job Location and Work Mode:
  • Richardson, TX (Hybrid; In Office 3 Days A Week)
Qualifications
The ideal candidate will have:
  • Minimum 1 year of experience in IC layout design and physical verification
  • ITAR Compliance (U.S. Persons meaning U.S. Citizen or U.S. Green Card Holder)
  • Experience using Cadence Virtuoso, VXL, or similar layout design tools
  • Familiarity with physical verification tools such as Assura (DRC, LVS, ERC) or equivalent
  • Basic understanding of analog, mixed-signal, or RF layout concepts
  • Knowledge of matching techniques, shielding, guard rings, and latch-up prevention
  • Strong analytical, troubleshooting, and problem-solving skills
  • Ability to work effectively in a collaborative team environment
  • Strong verbal and written communication skills
  • Bachelor's degree in Electrical Engineering or a related field
  • Exposure to scripting languages such as SKILL or PERL is a plus
  • Experience with advanced process technologies, FinFET, or GAA is a plus but not required
Responsibilities
As a Junior IC Layout Design Engineer, you will:
  • Support the layout and physical verification of analog, mixed-signal, RF, and custom digital circuits
  • Perform layout implementation while adhering to foundry design rules and project requirements
  • Assist with DRC, LVS, ERC, and other physical verification activities
  • Collaborate with design engineers to optimize layouts for performance, area, reliability, and manufacturability
  • Participate in design reviews and contribute to layout quality improvements
  • Help identify and resolve layout and verification issues
  • Learn and apply best practices for advanced IC layout methodologies
  • Contribute to project schedules and deliverables while maintaining high-quality standards
  • Support continuous improvement initiatives across design and layout processes
Why IC Enable?
At IC Enable, we know our most valuable asset is our team. We are looking for individuals who are ready to learn, grow, and contribute in a collaborative environment. We build our team around people who are humble, hungry, and smart, and we are committed to helping our employees develop their careers through mentorship and hands-on technical experience.
At IC Enable we know that our most valuable asset is our team. We are seeking a candidate who is ready to dive in to our culture and grow with our team. We build our team around those that are humble, hungry and smart!
IC Enable benefits include Medical, Dental, Vision and Ancillary benefits, 401K Plan with Company Match program.
IC Enable is an Equal Opportunity Employer
IC Enable logo

About IC Enable

Sourced by ZipRecruiter

Industry

Semiconductor and electronic component manufacturing

Company size

51 - 200 Employees

Headquarters location

Dallas, TX, US

Year founded

2004

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