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Ic Layout Design Engineer Jobs (NOW HIRING)

IC Enable

IC Layout Design Engineer

Richardson, TX · Hybrid

The team has an exciting opportunity for a IC Layout Design Engineer V to join our diverse team executing full-custom integrated circuit development with specific responsibility for driving the ...

Neuralink

Analog IC Layout Engineer

Fremont, CA

... chip design with advanced architectures and hardware accelerators with a goal of enhancing the ... As an Analog IC Layout Engineer, your responsibilities will include: * Crafting state-of-the-art ...

Neuralink

Analog IC Layout Engineer

Fremont, CA · On-site

$83K - $139K/yr

As an Analog IC Layout Engineer, your responsibilities will include: * Crafting state-of-the-art ... Experience with layout P-cell design and implementation * Experience with layout automation ...

Alphacore Inc

Analog Layout Design Engineer

Tempe, AZ · On-site

$193K/yr

Analog Layout Design Engineer (Contract Position) Location: Remote | Headquarters: Tempe, Arizona ... generation IC products. This is a contract role ideal for someone who thrives in a fast-paced ...

Alphacore Inc

Analog Layout Design Engineer

Arizona, LA · On-site +1

$193K/yr

Analog Layout Design Engineer (Contract Position) Location: Remote | Headquarters: Tempe, Arizona ... generation IC products. This is a contract role ideal for someone who thrives in a fast-paced ...

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How much do ic layout design engineer jobs pay per year?

As of Jun 6, 2026, the average yearly pay for ic layout design engineer in the United States is $120,849.00, according to ZipRecruiter salary data. Most workers in this role earn between $90,000.00 and $144,000.00 per year, depending on experience, location, and employer.

What does an IC Layout Design Engineer do?

An IC Layout Design Engineer is responsible for creating the physical design of integrated circuits (ICs) based on schematic designs. They ensure optimal placement and routing of transistors and interconnections while meeting performance, power, and area constraints. They work closely with circuit designers and verification engineers to ensure manufacturability and compliance with design rules. Tools like Cadence Virtuoso or Mentor Graphics are commonly used in this role.

What are the key skills and qualifications needed to thrive in the Ic Layout Design Engineer position, and why are they important?

To thrive as an IC Layout Design Engineer, you need strong expertise in analog and/or digital IC layout, semiconductor device physics, and an educational background in electrical engineering or a related field. Familiarity with industry-standard EDA tools such as Cadence Virtuoso, Mentor Graphics, and proficiency with layout verification techniques (like DRC and LVS) are typically required. Exceptional attention to detail, effective communication, and the ability to collaborate closely with circuit design teams are valuable soft skills. These skills are essential to ensure the successful design, optimization, and integration of complex integrated circuits in high-performance environments.

What are the common challenges faced by IC Layout Design Engineers on the job?

IC Layout Design Engineers often encounter challenges such as meeting strict design specification requirements, managing complex circuitry within limited silicon area, and ensuring layouts comply with manufacturing constraints. They may need to troubleshoot and resolve issues with DRC/LVS errors, work under tight project deadlines, and adapt quickly to changes in design parameters. Close collaboration with circuit design engineers and verification teams is common, requiring strong teamwork and effective communication. These challenges make the role dynamic and can provide excellent opportunities to develop specialized skills and advance into lead or principal engineering positions over time.

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Ic Layout Design Engineer jobs near you
Infographic showing various Ic Layout Design Engineer job openings in the United States as of May 2026, with employment types broken down into 79% Full Time, 4% Part Time, 13% Temporary, and 4% Contract. Highlights an 90% Physical, 3% Hybrid, and 7% Remote job distribution, with an average salary of $120,849 per year, or $58.1 per hour.
IC Layout Design Engineer

IC Layout Design Engineer

IC Enable

Richardson, TX • Hybrid

Full-time

Medical, Dental, Vision, Retirement

This job post has expired today. Applications are no longer accepted.

Job description

For over 20 years IC Enable has successfully provided design IP, IC products, services, and platform solutions to demanding customers ranging from startups to Fortune 50 members. Our design and product offerings focus on high reliability, mixed-signal and digital markets while our platform solutions focus on IDM, foundry and IP providers. Now is an exciting time to join our team as we continue to change the industry through experience in technology development, full-custom ASIC / SOC and electronics development across the Semiconductor, Medical and Defense industries, including some of the most challenging fabrication processes and product applications.

Expand on your career in Integrated Circuit Layout Design with IC Enable. The team has an exciting opportunity for a IC Layout Design Engineer V to join our diverse team executing full-custom integrated circuit development with specific responsibility for driving the layout and verification on complex, high-performance circuits with applications such as PLL, HSC, AGC, SerDes, ADC/DAC, Wireless systems, and custom logic. This position is best suited for a junior-mid level engineer who is hungry, humble and smart and is excited about growing his or her skillset in integrated circuit layout design and physical design.

Job Location and Work Mode:
  • Richardson, TX (Hybrid; In Office 3 Days A Week)
  • Remote eligibility available for qualified candidates, up to managements discretion

The best fit candidate for this position will have:

  • 3-5 years experience in layout and verification tools and methodologies for RF/Analog/Mixed Signal ICs
  • 3-5 years experience in Cadence layout (Virtuoso, VXL) and Calibre verification (ERC, DRC, LVS)
  • Demonstrated success in delivering quality work product
  • FinFET or GAA preferred, but not required
  • Debugging and analytical skills with complex technical concepts
  • Experience in DFM hierarchical layout construction for efficient verification and integration
  • Must understand techniques for managing layout dependent effects i.e. IR drop, RC delay, electron-migration, self- heating and crosstalk
  • Comprehensive understanding of matching, shielding, guard rings and latch up
  • Proficiency in PERL or SKILL scripting is a plus
  • Strong verbal and written communication
  • Bachelor’s Degree in Electrical Engineering or Applicable Field

While working with our team you will be responsible for:

  • Delivering on project assignments with integrity, commitment, and excellence
  • Efficiently laying out sensitive RF, Analog and Mixed Signal circuits conforming to all physical design verification (PDV) requirements while balancing demanding area, performance, and power specifications
  • Identifying quality and reliability improvements in IC circuit and layout design
  • Supporting or performing design verification from sub-block up through top-level
  • Collaborating effectively with local and remote team members
  • Developing accurate layout design schedules and resource estimates
  • Proactively looking for continuous improvement opportunities in the flow, layout and design methodologies
At IC Enable we know that our most valuable asset is our team. We are seeking a candidate who is ready to dive in to our culture and grow with our team. We build our team around those that are humble, hungry and smart!
IC Enable benefits include Medical, Dental, Vision and Ancillary benefits, 401K Plan with Company Match program.

IC Enable is an Equal Opportunity Employer

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About IC Enable

Sourced by ZipRecruiter

Industry

Semiconductor and electronic component manufacturing

Company size

51 - 200 Employees

Headquarters location

Dallas, TX, US

Year founded

2004

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