1

Intern Soc Design Engineer Jobs (NOW HIRING)

SoC Design Engineer Job Duties: Responsible for digital design and verification of image sensor and SoC systems, including IP design, integration, analysis, and validation. Design and verify image ...

SoC Design Engineer Job Duties: Responsible for digital design and verification of image sensor and SoC systems, including IP design, integration, analysis, and validation. Design and verify image ...

SoC Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

SoC Design Engineer Job Duties: Responsible for digital design and verification of image sensor and SoC systems, including IP design, integration, analysis, and validation. Design and verify image ...

SoC Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

SoC Design Engineer Job Duties: Responsible for digital design and verification of image sensor and SoC systems, including IP design, integration, analysis, and validation. Design and verify image ...

SoC Design Engineer

Austin, TX · On-site

$122K - $232K/yr

The Role and Impact As a SoC Logic Design Engineer, you will play a pivotal role in shaping the future of Intel's cutting-edge System on Chip (SoC) designs. This role offers an exciting opportunity ...

As a Senior SOC Design Engineer, you'll work at the forefront of technology, integrating advanced ASICs, and partnering with experts in ASIC design, Physical design, CAD, Package Design, Software ...

SoC Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor SoC products, including IP design, analysis, integration, and validation. Collaborate with physical ...

SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor SoC products, including IP design, analysis, integration, and validation. Collaborate with physical ...

SoC Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor SoC products, including IP design, analysis, integration, and validation. Collaborate with physical ...

The Role and Impact As a SoC Logic Design Engineer, you will play a pivotal role in shaping the future of Intel's cutting-edge System on Chip (SoC) designs. This role offers an exciting opportunity ...

SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor SoC products, including IP design, analysis, integration, and validation. Collaborate with physical ...

SoC Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

SoC Design Engineer Job Duties: * Design and verify digital circuits for CMOS image sensors (CIS), including sensor array timing control logic, analog-digital interface modules, and ISP (Image Signal ...

SoC Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

SoC Design Engineer Job Duties: * Design and verify digital circuits for CMOS image sensors (CIS), including sensor array timing control logic, analog-digital interface modules, and ISP (Image Signal ...

SoC Design Engineer Job Duties: * Design and verify digital circuits for CMOS image sensors (CIS), including sensor array timing control logic, analog-digital interface modules, and ISP (Image Signal ...

SoC Design Engineer Job Duties: * Design and verify digital circuits for CMOS image sensors (CIS), including sensor array timing control logic, analog-digital interface modules, and ISP (Image Signal ...

Principal SoC Design Engineer

Austin, TX · On-site

$153K - $265K/yr

Principal Engineer SoC Design About GlobalFoundries: GlobalFoundries is a leading full-service semiconductor foundry providing a unique combination of design, development, and fabrication services to ...

... integrated engineering team spanning RF/Analog architecture, and design, Systems/PHY/MAC ... Description Develop microarchitecture and RTL for a System-on-Chip (SoC) IP design, aligning with ...

... energy-efficient design and new technologies that transform the user experience at the product ... As a member of the team, you will work closely with SoC architects and IP developers to develop ...

next page

Showing results 1-20

Intern Soc Design Engineer information

See salary details

$9

$19

$36

How much do intern soc design engineer jobs pay per hour?

As of Jun 26, 2026, the average hourly pay for intern soc design engineer in the United States is $19.38, according to ZipRecruiter salary data. Most workers in this role earn between $14.42 and $21.63 per hour, depending on experience, location, and employer.

What is the salary of SoC design engineer in Nvidia?

The salary of an SoC (System on Chip) design engineer at Nvidia typically ranges from $100,000 to $150,000 annually, depending on experience, location, and specific role. Entry-level positions may start lower, while experienced engineers with specialized skills in hardware design and verification can earn higher compensation. Nvidia also offers benefits such as bonuses and stock options that can increase total compensation.

What is the difference between Intern Soc Design Engineer vs Intern Hardware Design Engineer?

AspectIntern Soc Design EngineerIntern Hardware Design Engineer
Required SkillsDigital/analog circuit design, FPGA, PCB layout, scriptingCircuit schematic, PCB design, component selection, testing
Work EnvironmentSemiconductor companies, electronics firms, R&D labsConsumer electronics, industrial equipment, R&D teams
Common UsageFocus on system-on-chip (SoC) architecture and integrationFocus on hardware components and circuit implementation

Intern Soc Design Engineers typically work on integrated circuit architecture and system integration, while Intern Hardware Design Engineers focus on designing and testing physical hardware components. Both roles involve electronics fundamentals but differ in scope and specific technical skills.

What is a SoC design engineer?

A SoC (System-on-Chip) design engineer is responsible for developing and integrating the hardware components of a single chip that combines processors, memory, and peripherals. They use hardware description languages like VHDL or Verilog and work closely with verification and validation teams to ensure functionality and performance. This role typically requires knowledge of digital design, embedded systems, and electronic design automation tools.

How much does a SoC design engineer make at Intel?

A SoC design engineer at Intel typically earns between $100,000 and $150,000 annually, depending on experience, location, and level. Entry-level positions may start lower, while senior roles with specialized skills in hardware description languages and FPGA tools can earn higher salaries.

What is the salary of SoC design engineer in Samsung?

The salary of a System-on-Chip (SoC) design engineer at Samsung typically ranges from $80,000 to $130,000 annually, depending on experience, location, and level of expertise. Entry-level engineers may earn lower salaries, while experienced professionals with specialized skills in hardware description languages and EDA tools can earn higher compensation.
What cities are hiring for Intern Soc Design Engineer jobs? Cities with the most Intern Soc Design Engineer job openings:
What are the most commonly searched types of Soc Design Engineer jobs? The most popular types of Soc Design Engineer jobs are:
What states have the most Intern Soc Design Engineer jobs? States with the most job openings for Intern Soc Design Engineer jobs include:
SoC Design Engineer

SoC Design Engineer

OMNIVISION

Santa Clara, CA

Full-time

Posted 20 days ago


Job description

Job Title: SoC Design Engineer
 
Job Duties:
 
Responsible for digital design and verification of image sensor and SoC systems, including IP design, integration, analysis, and validation. Design and verify image sensor control and processing functions, as well as high-speed interfaces such as USB and MIPI. Perform full-chip integration, verification, and system-level validation following standard ASIC design flows. Work closely with back-end teams on floorplanning, timing closure, static timing analysis (STA), and design-for-test (DFT). Design and integrate ISP data paths according to PRD/design specifications and overall SoC architecture. Execute ASIC implementation tasks including RTL coding, simulation, synthesis, formal verification, and DFT using industry-standard EDA tools such as Synopsys PrimeTime, Cadence Virtuoso, Design Compiler, and Integrator. Conduct chip bring-up, silicon validation, debugging, and performance tuning. Participate in FPGA prototyping and validation activities. Develop verification environments and models using SystemVerilog, SVA, Python, and Perl, and support hardware/software co-simulation. Collaborate with sensor, analog, algorithm, and application engineers on system design, module-level architecture, RTL implementation, micro-architecture design, image tuning, and product qualification. Prepare and maintain architecture, register, interface, and design documentation throughout the development lifecycle.
 
Requirements:
 
Master’s degree or foreign equivalent degree in Electrical Engineering, Computer Engineering, or related fields.
 
Require one year experience in Digital Design.
 
Experience shall include:
 
  • Wi-Fi PHY baseband RTL design and verification.
  • Digital signal processing module implementation using Verilog.
  • Module-level verification and full-chip integration support.
  • Design optimization techniques for area, power, and timing.
  • Using industry-standard digital design and verification tools.
  • Reading schematics and data sheets for software driver development on the SoC.
 
Annual base salary for this role in California, US is expected to be between $156,853 - $160,000. Actual pay will be determined on a number of factors such as relevant skills and experience, and the pay of employees in the similar role.