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From Home Soc Design Engineer Jobs (NOW HIRING)

OMNIVISION

SoC Design Engineer

Santa Clara, CA

SoC Design Engineer Job Duties: Responsible for digital design and verification of image sensor and SoC systems, including IP design, integration, analysis, and validation. Design and verify image ...

Nvidia

Senior SOC Design Engineer

Santa Clara, CA · Hybrid

As a Senior SOC Design Engineer, you'll work at the forefront of technology, integrating advanced ... From pioneering the GPU in 1999-sparking the PC gaming revolution and redefining computer graphics ...

OMNIVISION

SoC Design Engineer

Santa Clara, CA

$156K - $160K/yr

SoC Design Engineer Job Duties: Responsible for digital design and verification of image sensor and SoC systems, including IP design, integration, analysis, and validation. Design and verify image ...

OmniVision Technologies

SoC Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

SoC Design Engineer Job Duties: Responsible for digital design and verification of image sensor and SoC systems, including IP design, integration, analysis, and validation. Design and verify image ...

OMNIVISION

SoC Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

SoC Design Engineer Job Duties: Responsible for digital design and verification of image sensor and SoC systems, including IP design, integration, analysis, and validation. Design and verify image ...

Intel Corporation

SoC Design Engineer

Austin, TX · On-site

$122K - $232K/yr

The Role and Impact As a SoC Logic Design Engineer, you will play a pivotal role in shaping the future of Intel's cutting-edge System on Chip (SoC) designs. This role offers an exciting opportunity ...

OMNIVISION

SoC Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor SoC products, including IP design, analysis, integration, and validation. Collaborate with physical ...

OMNIVISION

SoC Design Engineer

Santa Clara, CA

$156K - $160K/yr

SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor SoC products, including IP design, analysis, integration, and validation. Collaborate with physical ...

Intel

SoC Design Engineer

Austin, TX

$122K - $232K/yr

The Role and Impact As a SoC Logic Design Engineer, you will play a pivotal role in shaping the future of Intel's cutting-edge System on Chip (SoC) designs. This role offers an exciting opportunity ...

OMNIVISION

SoC Design Engineer

Santa Clara, CA

SoC Design Engineer Job Duties: Be responsible for digital design of ASIC cores within image sensor SoC products, including IP design, analysis, integration, and validation. Collaborate with physical ...

OMNIVISION

SoC Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

SoC Design Engineer Job Duties: * Design and verify digital circuits for CMOS image sensors (CIS), including sensor array timing control logic, analog-digital interface modules, and ISP (Image Signal ...

OmniVision Technologies

SoC Design Engineer

Santa Clara, CA · On-site

$156K - $160K/yr

SoC Design Engineer Job Duties: * Design and verify digital circuits for CMOS image sensors (CIS), including sensor array timing control logic, analog-digital interface modules, and ISP (Image Signal ...

OMNIVISION

SoC Design Engineer

Santa Clara, CA

SoC Design Engineer Job Duties: * Design and verify digital circuits for CMOS image sensors (CIS), including sensor array timing control logic, analog-digital interface modules, and ISP (Image Signal ...

OMNIVISION

SoC Design Engineer

Santa Clara, CA

$156K - $160K/yr

SoC Design Engineer Job Duties: * Design and verify digital circuits for CMOS image sensors (CIS), including sensor array timing control logic, analog-digital interface modules, and ISP (Image Signal ...

GlobalFoundries

Principal SoC Design Engineer

Austin, TX · On-site

$153K - $265K/yr

Principal Engineer SoC Design About GlobalFoundries: GlobalFoundries is a leading full-service ... This individual contributor role drives end-to-end SoC design-from architecture definition and ...

Apple

Wireless SoC Design Engineer

San Diego, CA · On-site

Our wireless SOC organization is responsible for all aspects of wireless silicon development. With ... phases-from concept to silicon bring-up. Work closely with physical design, DFT, and CAD teams to ...

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From Home Soc Design Engineer information

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$88.2K

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How much do from home soc design engineer jobs pay per year?

As of Jun 10, 2026, the average yearly pay for from home soc design engineer in the United States is $88,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $68,000.00 and $98,500.00 per year, depending on experience, location, and employer.
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From Home Soc Design Engineer jobs near you
Infographic showing various From Home Soc Design Engineer job openings in the United States as of June 2026, with employment types broken down into 1% Locum Tenens, 2% As Needed, 19% Full Time, 64% Part Time, and 14% Contract. Highlights an 81% Physical, 6% Hybrid, and 13% Remote job distribution, with an average salary of $88,150 per year, or $42.4 per hour.
SoC Design Engineer

SoC Design Engineer

OMNIVISION

Santa Clara, CA

Full-time

Posted 3 days ago

Job description

Job Title: SoC Design Engineer
 
Job Duties:
 
Responsible for digital design and verification of image sensor and SoC systems, including IP design, integration, analysis, and validation. Design and verify image sensor control and processing functions, as well as high-speed interfaces such as USB and MIPI. Perform full-chip integration, verification, and system-level validation following standard ASIC design flows. Work closely with back-end teams on floorplanning, timing closure, static timing analysis (STA), and design-for-test (DFT). Design and integrate ISP data paths according to PRD/design specifications and overall SoC architecture. Execute ASIC implementation tasks including RTL coding, simulation, synthesis, formal verification, and DFT using industry-standard EDA tools such as Synopsys PrimeTime, Cadence Virtuoso, Design Compiler, and Integrator. Conduct chip bring-up, silicon validation, debugging, and performance tuning. Participate in FPGA prototyping and validation activities. Develop verification environments and models using SystemVerilog, SVA, Python, and Perl, and support hardware/software co-simulation. Collaborate with sensor, analog, algorithm, and application engineers on system design, module-level architecture, RTL implementation, micro-architecture design, image tuning, and product qualification. Prepare and maintain architecture, register, interface, and design documentation throughout the development lifecycle.
 
Requirements:
 
Master’s degree or foreign equivalent degree in Electrical Engineering, Computer Engineering, or related fields.
 
Require one year experience in Digital Design.
 
Experience shall include:
 
  • Wi-Fi PHY baseband RTL design and verification.
  • Digital signal processing module implementation using Verilog.
  • Module-level verification and full-chip integration support.
  • Design optimization techniques for area, power, and timing.
  • Using industry-standard digital design and verification tools.
  • Reading schematics and data sheets for software driver development on the SoC.
 
Annual base salary for this role in California, US is expected to be between $156,853 - $160,000. Actual pay will be determined on a number of factors such as relevant skills and experience, and the pay of employees in the similar role.