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Remote Soc Design Engineer Jobs (NOW HIRING)

Futran Tech Solutions Pvt. Ltd.

Physical Design Engineer

$139K - $143K/yr

Overall, 7 to 12 yrs of exp as a Physical Design Engineer. (Remote Opening) Must Have : Advance Node Exp 3nm/5nm,Full Chip Integration, Advance/Complex SOC Integration, Cadence/Synopsys (Innovus ...

MatX

SOC Intergration Engineer

Mountain View, CA · Remote

$175K - $450K/yr

MatX is seeking silicon micro-architects and design engineers to join our team as we create best-in ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...

Apex Informatics

SOC Engineer

100% remote SOC Engineer 12-month contract Job Summary: The SOC Engineer will monitor, detect, analyze, and respond to security incidents affecting the SPC environment. You will leverage your ...

Redolent, Inc.

US_West | Infrastructure Engineer_L3

$169K/yr

Marie.samayoa@capgemini.com SOC Design Verification Engineer Location: Redmond, WA Hybrid (Remote option allowed) Minimum Qualifications • Track record of 'first-pass success' in ASIC development ...

Cornelis Networks

PCIe ASIC Design Engineer

San Jose, CA · On-site +1

... in ASIC/SoC design with a focus on PCIe controller integration. * Proven experience in silicon ... This is a remote position for employees residing within the United States. We offer a competitive ...

Cornelis Networks

PCIe ASIC Design Engineer

San Jose, CA · On-site +1

... in ASIC/SoC design with a focus on PCIe controller integration. * Proven experience in silicon ... This is a remote position for employees residing within the United States. We offer a competitive ...

MatX

ASIC/SOC CAD Engineer

Mountain View, CA · On-site +1

$175K - $362K/yr

The ASIC/SOC Physically Design CAD Engineer will be responsible for creating and maintaining our CA ... Remote Perks We work remotely Monday & Friday, supported by home-tech setup, and remote wifi ...

K2 Space

Senior ASIC Physical Design Engineer

$170K - $250K/yr

In your first 6 months, you will develop and implement new SoC sub-systems for satellite ... Computer Engineering, or related field. * 5-10 years of experience in ASIC physical design for ...

Navtech, Inc.

Digital Design Engineer.

$139K/yr

REMOTE Duration : 6+ Months on W2 Visa : Independent candidates who are eligible to work for any ... larger SOC environments • Assist with algorithm analysis. Must Have Skills: • 4+ years of ...

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How much do remote soc design engineer jobs pay per hour?

As of Jun 5, 2026, the average hourly pay for remote soc design engineer in the United States is $50.69, according to ZipRecruiter salary data. Most workers in this role earn between $39.18 and $61.78 per hour, depending on experience, location, and employer.
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Remote Soc Design Engineer jobs near you

RTL Design Engineer - Wireless SoC

Vkore Solutions

San Jose, CA • Remote

$55 - $60/hr

Contractor

Posted 2 days ago

Job description

Job Title: RTL Design Engineer – Wireless SoC

Location: Remote

Job Type: Contract

 

Job Description

We are seeking an experienced RTL Design Engineer to work on next-generation wireless SoC development. The ideal candidate will design and implement high-performance digital blocks and work closely with architecture, analog/mixed-signal, and verification teams to deliver production-quality silicon.

Key Responsibilities

  • Design, implement, and verify digital blocks for wireless SoCs using SystemVerilog/Verilog
  • Translate architectural and algorithmic specifications into synthesizable RTL
  • Implement DSP blocks such as filtering, FFT/IFFT, beamforming, etc.
  • Develop RTL for SoC components including interfaces, clock/reset, power management, and debug logic
  • Work with internal and external IP integration into chip-level designs
  • Collaborate with AMS teams on digital-analog interfaces, calibration logic, and control systems
  • Drive PPA (power, performance, area) optimization and support timing closure with backend teams
  • Participate in design reviews, integration, synthesis, and timing closure activities
  • Support silicon bring-up and lab validation of digital subsystems

Required Skills

  • 5+ years of hands-on RTL design experience (SystemVerilog / Verilog)
  • Strong understanding of micro-architecture and RTL implementation from specs
  • Experience in DSP hardware implementation (filtering, FFT, etc.)
  • Knowledge of SoC design flows: CDC, power domains, timing constraints, formal verification
  • Experience with synthesis, linting, simulation, and STA tools
  • Understanding of DFT concepts (scan, BIST)
  • Strong debugging and problem-solving skills
  • Good communication and ability to work in cross-functional teams

Preferred Skills

  • Experience in wireless SoC domains (Wi-Fi, cellular, mmWave, satellite, etc.)
  • RTL design of datapath, FIFO, DMA, arbitration, and SoC bus (AXI/AHB)
  • DSP modeling experience (MATLAB / Python / C++) and RTL conversion
  • Post-silicon debug and chip bring-up experience
  • Exposure to analog-mixed signal interfaces and calibration logic
  • Experience in distributed/global team environments