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Remote Soc Design Engineer Jobs (NOW HIRING)

We are seeking experienced ASIC and SoC Design & Verification Engineers to contribute their ... This is a fully remote, part-time engagement requiring approximately 20-40 hours per week ...

RTL Design Engineer

Richardson, TX · On-site +1

$122K/yr

... SoC development flows, and the ability to collaborate across design, verification, analog/mixed ... Richardson, TX (Hybrid, Remote considered based on experience and qualifications) What You'll Do:

Senior ASIC Physical Design Engineer

OR · On-site +1

$170K - $250K/yr

In your first 6 months, you will develop and implement new SoC sub-systems for satellite ... Computer Engineering, or related field. * 5-10 years of experience in ASIC physical design for ...

100% remote SOC Engineer 12-month contract Job Summary: The SOC Engineer will monitor, detect, analyze, and respond to security incidents affecting the SPC environment. You will leverage your ...

Marie.samayoa@capgemini.com SOC Design Verification Engineer Location: Redmond, WA Hybrid (Remote option allowed) Minimum Qualifications • Track record of 'first-pass success' in ASIC development ...

... in ASIC/SoC design with a focus on PCIe controller integration. * Proven experience in silicon ... This is a remote position for employees residing within the United States. We offer a competitive ...

In your first 6 months, you will develop and implement new SoC sub-systems for satellite ... Computer Engineering, or related field. * 5-10 years of experience in ASIC physical design for ...

Digital Design Engineer.

$139K/yr

REMOTE Duration : 6+ Months on W2 Visa : Independent candidates who are eligible to work for any ... larger SOC environments • Assist with algorithm analysis. Must Have Skills: • 4+ years of ...

RTL Design/AMS Verification Engineer

Richardson, TX · On-site +1

$122K - $149K/yr

We specialize in advanced technology development, full-custom ASIC/SoC design, and electronics ... Remote Key Responsibilities * Develop, integrate, and verify Verilog RTL for digital and mixed ...

Senior MBIST Engineer Remote- Must be working as per PST time zone Rate- 70-75/hr on C2C Position Summary We are looking for a highly experienced Senior MBIST Contractor to join our SoC Design-for ...

Design Engineer

New York, NY · On-site +1

$160K - $220K/yr

... SOC. We are building the next-generation operating system for security teams. Vega is already ... If you love the seam where design and engineering meet, this is the role. What you'll do * Own vega ...

Remote --Client: Commercial Building Developer --Responsibilities: Design structural civil layouts for buildings. This person will offer construction and design solutions to internal and external ...

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Remote Soc Design Engineer information

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How much do remote soc design engineer jobs pay per hour?

As of Aug 27, 2026, the average hourly pay for remote soc design engineer in the United States is $50.69, according to ZipRecruiter salary data. Most workers in this role earn between $39.18 and $61.78 per hour, depending on experience, location, and employer.
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Infographic showing various Remote Soc Design Engineer job openings in the United States as of August 2026, with employment types broken down into 90% Full Time, 7% Part Time, and 3% Contract. Highlights an 81% Physical, 5% Hybrid, and 14% Remote job distribution, with an average salary of $105,435 per year, or $50.7 per hour.

RTL Design Engineer - Wireless SoC

San Jose, CA • Remote

$55 - $60/hr

Contractor

Re-posted 25 days ago


Job description

Job Title: RTL Design Engineer – Wireless SoC

Location: Remote

Job Type: Contract

 

Job Description

We are seeking an experienced RTL Design Engineer to work on next-generation wireless SoC development. The ideal candidate will design and implement high-performance digital blocks and work closely with architecture, analog/mixed-signal, and verification teams to deliver production-quality silicon.

Key Responsibilities

  • Design, implement, and verify digital blocks for wireless SoCs using SystemVerilog/Verilog
  • Translate architectural and algorithmic specifications into synthesizable RTL
  • Implement DSP blocks such as filtering, FFT/IFFT, beamforming, etc.
  • Develop RTL for SoC components including interfaces, clock/reset, power management, and debug logic
  • Work with internal and external IP integration into chip-level designs
  • Collaborate with AMS teams on digital-analog interfaces, calibration logic, and control systems
  • Drive PPA (power, performance, area) optimization and support timing closure with backend teams
  • Participate in design reviews, integration, synthesis, and timing closure activities
  • Support silicon bring-up and lab validation of digital subsystems

Required Skills

  • 5+ years of hands-on RTL design experience (SystemVerilog / Verilog)
  • Strong understanding of micro-architecture and RTL implementation from specs
  • Experience in DSP hardware implementation (filtering, FFT, etc.)
  • Knowledge of SoC design flows: CDC, power domains, timing constraints, formal verification
  • Experience with synthesis, linting, simulation, and STA tools
  • Understanding of DFT concepts (scan, BIST)
  • Strong debugging and problem-solving skills
  • Good communication and ability to work in cross-functional teams

Preferred Skills

  • Experience in wireless SoC domains (Wi-Fi, cellular, mmWave, satellite, etc.)
  • RTL design of datapath, FIFO, DMA, arbitration, and SoC bus (AXI/AHB)
  • DSP modeling experience (MATLAB / Python / C++) and RTL conversion
  • Post-silicon debug and chip bring-up experience
  • Exposure to analog-mixed signal interfaces and calibration logic
  • Experience in distributed/global team environments