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Remote System Verilog Jobs (NOW HIRING)

US_West | Network Design Engineer_L3

$102K - $140K/yr

Santa Clara, CA Remote work option allowed Required: Minimum 10 years of strong experience in Digital design at RTL level using Verilog/System Verilog Experience in developing micro architectural ...

Senior FPGA Engineer

Herndon, VA · On-site +1

$91K - $159K/yr

This position is based out of our Herndon, VA location with the option of a remote work schedule ... Implementing and documenting FPGA designs using HDL (System Verilog, VHDL, etc.) * Supporting ...

Senior FPGA Engineer

Herndon, VA · On-site +1

$91K - $159K/yr

This position is based out of our Herndon, VA location with the option of a remote work schedule ... Implementing and documenting FPGA designs using HDL (System Verilog, VHDL, etc.) * Supporting ...

SOC Verification

New Marlborough, MA · Remote

$139K/yr

Remote 1. General verification expertise - * System Verilog * UVM working experience (In the current scenario not much on UVM, but heavily on "C") * Understanding of ARM processor based SOCs, AXI ...

FPGA Engineer - Work From Home

Chicago, IL · On-site +1

$133K - $172K/yr

... System Verilog. - Proficiency with a full simulator such as ModelSim. - Ability to transition ... Remote, Work From Home, Financial, Trading, Chicago Recruiters, Information Technology Jobs ...

$134K - $185K/yr

... well as remote sensing applications. Position Description: We are seeking a new FPGA Design ... Expertise in Verilog/System Verilog * Proficiency in RTL simulation (ModelSim,xSim etc.), and ...

RTL Design Engineer

Richardson, TX · On-site +1

$122K/yr

... systems. Location: Richardson, TX (Hybrid, Remote considered based on experience and qualifications) What You'll Do: * Develop, integrate, and debug Verilog/SystemVerilog RTL for digital blocks ...

$134K - $195K/yr

Experience with VHDL or Verilog or System Verilog or OpenCL or high-level synthesis tools (HLS ... Maryland, United States (Remote) Additional Locations: Posting Statement: All qualified applicants ...

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Showing results 1-20

Remote System Verilog information

See salary details

$53.5K

$127.2K

$167K

How much do remote system verilog jobs pay per year?

As of Aug 19, 2026, the average yearly pay for remote system verilog in the United States is $127,215.00, according to ZipRecruiter salary data. Most workers in this role earn between $98,000.00 and $157,000.00 per year, depending on experience, location, and employer.

What is the difference between Remote System Verilog vs Remote FPGA Engineer?

AspectRemote System VerilogRemote FPGA Engineer
Required CredentialsBachelor's in Electrical Engineering or Computer Engineering, Verilog/SystemVerilog certificationsBachelor's in Electrical Engineering, FPGA design certifications, Verilog/SystemVerilog knowledge
Work EnvironmentDesign verification, simulation, and hardware description in a remote settingFPGA development, implementation, and testing remotely
Industry UsageSemiconductor, electronics, ASIC/FPGA design companiesEmbedded systems, telecommunications, aerospace, and defense sectors

Remote System Verilog and Remote FPGA Engineer roles share a focus on hardware description languages and often require similar technical credentials. However, Remote System Verilog primarily involves verification and simulation tasks, while Remote FPGA Engineers focus on designing and implementing FPGA hardware. Both roles are common in electronics and semiconductor industries, often offered remotely to skilled engineers.

More about Remote System Verilog jobs

What cities are hiring for Remote System Verilog jobs?

Cities with the most Remote System Verilog job openings:

What are the most commonly searched types of System Verilog jobs?

The most popular types of System Verilog jobs are:

What states have the most Remote System Verilog jobs?

States with the most job openings for Remote System Verilog jobs include:

What job categories do people searching Remote System Verilog jobs look for?

The top searched job categories for Remote System Verilog jobs are:

Infographic showing various Remote System Verilog job openings in the United States as of August 2026, with employment types broken down into 76% Full Time, 5% Part Time, and 19% Contract. Highlights an 100% Remote job distribution, with an average salary of $127,215 per year, or $61.2 per hour.

US_West | Network Design Engineer_L3

Redolent, Inc.

Remote

$102K - $140K/yr

Contractor

Re-posted 3 days ago


Job description

Description:
Possible 3 Month CTH | No Fees | Do Not Re-Post | Confidential
Skype interview is mandatory please provide the candidates skype ID, VIDEO INTERVIEW IS MANDATORY. NO CPT ALLOWED.
Submit candidates under their legal name and use only Capgemini template
Candidate's photo ID IS MANDATORY FOR ALL CANDIDATES EVEN CITIZENS.
In your submission include:
Phone #:
Email address:
Location (City and State):
Relocate:
Availability to start:
Visa type and expiration date:
Hiring Status: C2C/W2/1099QOpen for CTH (y/n):
Timeslots for Skype interview (provide Skype ID)
Due to additional onboarding requirements, a meet and greet is required for all new hires.
Candidates must be willing to go to the closest Capgemini, Client, or offsite location as indicated by project team to meet with a Capgemini team member prior to starting their assignment.
If the candidate is not local, travel will be required at the expense of the Capgemini project team (will receive project code for vendor to submit invoices in SAP Fieldglass for reimbursement). If travel is involved, will send travel policy document for the candidate to adhere to
Vendors: If your candidate is selected for interview, you need to take screenshot of candidate and interviewer once interview is initiated. THIS IS NOW MANDATORY FOR ALL INTERVIEWS to confirm candidate is same as person in CV.
Marie Samayoa
OBO Tactical Procurement | Procurement
Capgemini North America | Guatemala
Email: Marie.samayoa@capgemini.com
Job Description: Digital Design (RTL) Engineer
Location: Santa Clara, CA
Remote work option allowed
Required:
Minimum 10 years of strong experience in Digital design at RTL level using Verilog/System Verilog
Experience in developing micro architectural document from requirements specifications
Experience developing designs from scratch
Experience applying linting and other (QC) quality checking and basic verification of designs.
Experience supporting SoC designers in integration as needed
Strong communication and collaboration skills
Preferred:
-Desirable but not essential experience: DMA, memory controller, MIPI DSI/CSI, data and control path pipeline design, interconnect and AMBA interfaces.
- Candidate with design automation, scripting experience (Python) is preferrable
• Develop HW architecture from specification documents.
• Take complete responsibilities include writing RTL code for IP development/RTL integration, checking the code for Lint/CDC issues, checking synthesizability and timing quality of the design, checking low power implementation, supporting verification team with debug and support physical design teams on timing constraints and other design topics using Verilog/System Verilog/VHDL.
• Develop and execute low power design (UPF/CPF).
• Design top level RTL, integration of blocks, clocks, resets, configuration registers, etc
• Knowledge of JESD204C block design and related design/verification experience (includes licensed IP & PHY from 3rd parties)
• Awareness of DFT concepts to be used to fix functional violation that may get introduced which including DFT structures.
• Carry out static checks including Lint/CDC (Spyglass), synthesis, LEC and STA. Debugging and fixing functional break.
• Take ownership of tasks and drive tasks to closure.
Synopsys/Cadence EDA Tools (Priority: 1)
LEC (Priority: 2)
STA/Constraints (Priority: 2)
Named Job Posting? (if Yes - needs to be approved by SCSC)
Additional Details
  • Global Grade : C
  • Named Job Posting? (if Yes - needs to be approved by SCSC) : No
  • Remote work possibility : (No Value)
  • Global Role Family : 60239 (P) Cloud Infrastructure
  • Global Technical Skills Family : 6246 (T) Network operate & administration Technologies
  • Local Role Name : Digital Design (RTL) Engineer
  • Local Skills : Julie Skidmore
  • Languages Required: : English

Redolent logo

About Redolent

Sourced by ZipRecruiter

Redolent, a dynamic and rapidly expanding company committed to excellence in software solutions, where success is fueled by a combination of technical expertise and efficient management practices. Our solutions create a measurable delta in our clients’ productivity and profitability, contributing to their growth and success.

Industry

It services

Company size

51 - 200 Employees

Headquarters location

San Jose, CA, US

Year founded

2008

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