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Intern Soc Design Engineer Jobs in Texas (NOW HIRING)

SoC Design Engineer

Austin, TX · On-site

$122K - $232K/yr

The Role and Impact As a SoC Logic Design Engineer, you will play a pivotal role in shaping the future of Intel's cutting-edge System on Chip (SoC) designs. This role offers an exciting opportunity ...

The Role and Impact As a SoC Logic Design Engineer, you will play a pivotal role in shaping the future of Intel's cutting-edge System on Chip (SoC) designs. This role offers an exciting opportunity ...

As an HBM SOC Design Engineer, you will be responsible for the design & development of next-generation HBM DRAM products. You will be part of a highly multi-functional team of technical domain ...

SOC Design Verification Engineer

Dallas, TX · On-site

$127K - $156K/yr

SOC Design Verification Engineer Location: Redmond, WA (Onsite) Duration: 10 Months Minimum Qualifications • Track record of 'first-pass success' in ASIC development cycles. • Bachelor's degree ...

Apple's SOC Silicon Validation Services team is looking for a skilled and curious engineer to help ... Description -Design, build, and enhance silicon debug tools spanning automated feature extraction ...

Director, SoC Design Engineering

Austin, TX

$134K - $164K/yr

The Role and Impact We are seeking a highly experienced a Director, SoC Design Engineering, to lead the functional verification efforts for cutting-edge system-on-chip (SoC) designs. In this ...

The Role and Impact As a SoC Logic Design Engineer, you will play a pivotal role in advancing Intel's next-generation System on Chip (SoC) designs. In this role, you will focus on developing high ...

The Role and Impact Join Intel's distinguished team as an SoC Logic Design Engineer. In this role, you will pioneer the development of cutting-edge System-on-Chip (SoC) solutions, contributing to ...

SoC Logic Design Engineer

Austin, TX · On-site

$141K - $200K/yr

The Role and Impact As a SoC Logic Design Engineer, you will play a pivotal role in advancing Intel's next-generation System on Chip (SoC) designs. In this role, you will focus on developing high ...

Apple's SOC Silicon Validation Services team is looking for a skilled and curious engineer to help ... Description -Design, build, and enhance silicon debug tools spanning automated feature extraction ...

Apple's SOC Silicon Validation Services team is looking for a skilled and curious engineer to help ... Description -Design, build, and enhance silicon debug tools spanning automated feature extraction ...

Apple's SOC Silicon Validation Services team is looking for a skilled and curious engineer to help ... Description -Design, build, and enhance silicon debug tools spanning automated feature extraction ...

As part of our Silicon Engineering group, you will generate ideas and turn them into reality. You ... You will collaborate across many teams including architecture, SOC design, and system design. The ...

We're seeking a CAD Engineer to join our team and develop full-stack web applications that power the Signoff infrastructure across all Apple SOC design groups within the Hardware Tech group. Signoff ...

By hiring incredible engineers, we drive precision. And through our collaborative process, we build ... In this role, you will be directly involved in our SoC design machine learning efforts ...

We're seeking a CAD Engineer to join our team and develop full-stack web applications that power the Signoff infrastructure across all Apple SOC design groups within the Hardware Tech group. Signoff ...

As part of our Silicon Engineering group, you will generate ideas and turn them into reality. You ... You will collaborate across many teams including architecture, SOC design, and system design. The ...

As part of our Silicon Engineering group, you will generate ideas and turn them into reality. You ... You will collaborate across many teams including architecture, SOC design, and system design. The ...

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Showing results 1-20

Intern Soc Design Engineer information

What is the difference between Intern Soc Design Engineer vs Intern Hardware Design Engineer?

AspectIntern Soc Design EngineerIntern Hardware Design Engineer
Required SkillsDigital/analog circuit design, FPGA, PCB layout, scriptingCircuit schematic, PCB design, component selection, testing
Work EnvironmentSemiconductor companies, electronics firms, R&D labsConsumer electronics, industrial equipment, R&D teams
Common UsageFocus on system-on-chip (SoC) architecture and integrationFocus on hardware components and circuit implementation

Intern Soc Design Engineers typically work on integrated circuit architecture and system integration, while Intern Hardware Design Engineers focus on designing and testing physical hardware components. Both roles involve electronics fundamentals but differ in scope and specific technical skills.

What cities in Texas are hiring for Intern Soc Design Engineer jobs? Cities in Texas with the most Intern Soc Design Engineer job openings:
Infographic showing various Intern Soc Design Engineer job openings in Texas as of August 2026, with employment types broken down into 50% Full Time, and 50% Part Time. Highlights an 100% In-person job distribution.

SoC Design Engineer

Intel Corporation

Austin, TX • On-site

$122K - $232K/yr

Full-time

Medical, Retirement, PTO

Re-posted 24 days ago


Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

19th of 156 rated electronics manufacturers


Job description

Job Details:
Job Description:
The Role and Impact
As a SoC Logic Design Engineer, you will play a pivotal role in shaping the future of Intel's cutting-edge System on Chip (SoC) designs. This role offers an exciting opportunity to contribute to the development of world-class technology solutions that drive innovation across diverse industries. You will be responsible for developing high-quality logic designs, coding register transfer level (RTL) models, and performing thorough simulations to ensure optimal functionality. Your contributions will directly impact the success of Intel's products by enabling power-efficient, high-performance, and scalable solutions that meet or exceed market demands.
Key Responsibilities
  • Develop logic designs and RTL code for SoC designs, ensuring alignment with architectural and microarchitectural specifications
  • Perform integration of logic for IP blocks and subsystems into full-chip SoC designs
  • Conduct quality checks across various logic design aspects, including RTL, timing, power, and area convergence, and address design integrity for physical implementation
  • Optimize logic designs to meet stringent power, performance, area, and timing goals
  • Review verification plans and ensure the correctness of tested design features
  • Resolve RTL test failures by implementing corrective measures to ensure design feature correctness
  • Apply secure development practices to mitigate security threats and meet secure design objectives
  • Collaborate with IP providers to integrate and validate IP at the SoC level
  • Drive compliance with quality assurance standards to enable seamless IP/SoC handoffs

Core Competencies
  • Demonstrated ability to work collaboratively across teams and communicate effectively in complex technical environments
  • Passion for innovation, problem-solving, and continuous learning within the field of SoC design

Qualifications:
The Minimum qualifications are required to be initially considered for this position. Minimum qualifications listed below would be obtained through a combination of industry relevant job experience, internship experience and / or schoolwork/classes/research. The preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
Minimum Qualifications
  • Bachelor's degree in Electrical Engineering, Computer Engineering, or in a STEM related field
  • 3+ years of experience in microarchitecture development, RTL coding, or logic design
  • Experience in clock domain crossing techniques, low-power design methodologies, and SoC clocking structures
  • Experience with tools and strategies for RTL design, SoC integration, and physical implementation optimization

Preferred Qualifications
  • Master's degree in Electrical Engineering, Computer Engineering, or in a STEM related field.
  • Experience with secure development practices for secure design implementation.
  • Experience in SoC Builder and Network-on-Chip (NoC) architectures.

Become part of Intel's mission to advance technology and create products that enrich lives. Your expertise in SoC logic design can make a meaningful impact-join us today.
Job Type:
Experienced Hire
Shift:
Shift 1 (United States of America)
Primary Location:
US, Texas, Austin
Additional Locations:
Business group:
The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Benefits
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $122,440.00-232,190.00 USD
The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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Intel logo

About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968