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Intern Asic Design Engineer Jobs (NOW HIRING)

Principal ASIC Design Engineer

San Jose, CA ยท On-site

$180K - $210K/yr

About the Role As a Principal ASIC Design Engineer, you will be responsible for all aspects of front-end ASIC design, including RTL implementation and verification of complex logic blocks. You will ...

Principal ASIC Design Engineer

Boulder, CO ยท On-site

$180K - $220K/yr

Support hiring and mentoring a small team of ASIC engineers as required to implement the products. * Perform hands-on ASIC design including microarchitecture, RTL development, testing, and ...

ASIC Design Engineer

Santa Clara, CA ยท On-site

$126K - $190K/yr

OR Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience. OR PhD in Science, Engineering, or related ...

Principal ASIC Design Engineer

San Jose, CA ยท On-site

$180K - $210K/yr

About the Role As a Principal ASIC Design Engineer, you will be responsible for all aspects of front-end ASIC design, including RTL implementation and verification of complex logic blocks. You will ...

NVIDIA is seeking ASIC Design Engineers to implement the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted, technology-focused company ...

Jr. ASIC Design Engineer

Batavia, NY ยท Hybrid

$70K - $93K/yr

We are looking for a Junior ASIC Design Engineer to lead and contribute to research activities and engineering work focused on developing custom instrumentation for extreme radiation and/or cryogenic ...

We're seeking engineers who are energized by working on cutting-edge ASIC design and distributed software systems, and who are motivated to push the boundaries on how AI can transform everything from ...

NVIDIA is seeking best-in-class ASIC Design Engineers to design and implement the world's leading SoC's and GPU's. This position offers the opportunity to have real impact in a multifaceted ...

Jr. ASIC Design Engineer

Batavia, IL ยท On-site

$70K - $93K/yr

We are looking for a Junior ASIC Design Engineer to lead and contribute to research activities and engineering work focused on developing custom instrumentation for extreme radiation and/or cryogenic ...

Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Write microarchitecture and/or design specifications - Design, implement, and debug complex logic ...

Description As an ASIC Design Engineer, your responsibilities span various aspects of SOC design: - Write microarchitecture and/or design specifications - Design, implement, and debug complex logic ...

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Intern Asic Design Engineer information

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How much do intern asic design engineer jobs pay per hour?

As of Jul 18, 2026, the average hourly pay for intern asic design engineer in the United States is $19.38, according to ZipRecruiter salary data. Most workers in this role earn between $14.42 and $21.63 per hour, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as an Intern ASIC Design Engineer, and why are they important?

To thrive as an Intern ASIC Design Engineer, you need a solid background in digital logic design, computer architecture, and a relevant degree in electrical or computer engineering. Familiarity with hardware description languages such as Verilog or VHDL, simulation tools, and EDA software is typically required. Strong analytical thinking, attention to detail, teamwork, and effective communication make an intern stand out in this role. These skills and qualities are crucial for designing reliable, high-performance integrated circuits and collaborating efficiently within engineering teams.

What does an Intern ASIC Design Engineer do?

An Intern ASIC Design Engineer assists in designing, developing, and verifying Application-Specific Integrated Circuits (ASICs) under the guidance of senior engineers. Their responsibilities often include working with hardware description languages like Verilog or VHDL, running simulations, debugging designs, and performing tests to ensure functionality and performance. Interns may also help with documentation, design reviews, and collaborating with cross-functional teams. This role provides hands-on experience in the semiconductor industry and helps build foundational skills for a career in hardware engineering.

What is the difference between Intern Asic Design Engineer vs Intern Digital Design Engineer?

AspectIntern Asic Design EngineerIntern Digital Design Engineer
CredentialsTypically pursuing or holding a degree in Electrical Engineering or Computer EngineeringTypically pursuing or holding a degree in Electrical Engineering or Computer Engineering
Work EnvironmentDesign teams focused on ASIC development, hardware design labs, collaborative projectsDigital circuit design, simulation, verification, and hardware testing environments
Industry UsageUsed in semiconductor companies, integrated circuit design firms, and hardware startupsCommon in semiconductor, electronics, and hardware development companies

Both roles involve working on digital hardware design, often requiring similar educational backgrounds. The main difference lies in the focus: Intern Asic Design Engineers work on the overall ASIC development process, while Intern Digital Design Engineers focus specifically on digital circuit design and verification. Both positions are essential in hardware development and often overlap in skills and work environment.

What types of projects and responsibilities can I expect as an Intern ASIC Design Engineer?

As an Intern ASIC Design Engineer, you can expect to work on a variety of tasks that support the design and verification of integrated circuits. Typical responsibilities include assisting with RTL coding, running simulations, analyzing test results, and documenting design processes. You'll often collaborate closely with senior engineers and cross-functional teams, gaining exposure to state-of-the-art tools and methodologies. This role provides a valuable learning environment where you're encouraged to ask questions, contribute to team discussions, and develop practical skills that are highly valued in the semiconductor industry.
More about Intern Asic Design Engineer jobs
What cities are hiring for Intern Asic Design Engineer jobs? Cities with the most Intern Asic Design Engineer job openings:
What are the most commonly searched types of Asic Design Engineer jobs? The most popular types of Asic Design Engineer jobs are:
What states have the most Intern Asic Design Engineer jobs? States with the most job openings for Intern Asic Design Engineer jobs include:
Infographic showing various Intern Asic Design Engineer job openings in the United States as of July 2026, with employment types broken down into 95% Full Time, 1% Part Time, 2% Contract, and 2% Summer. Highlights an 89% Physical, 6% Hybrid, and 5% Remote job distribution, with an average salary of $40,304 per year, or $19.4 per hour.
Principal ASIC Design Engineer

Principal ASIC Design Engineer

Credo, Inc

San Jose, CA โ€ข On-site

$180K - $210K/yr

Full-time

This job post hasย expired today.ย Applications are no longer accepted.


Job description

Credo is engineering the future of high-speed connectivity for the AI-driven world. With a deeply rooted legacy of innovation and a passion for solving the most complex networking challenges, we deliver industry-leading solutions that power the next generation of cloud, AI, and hyperscale data centers.
Credo is pioneering a systems-level approach to connectivity, integrating hardware, software, and architecture to deliver holistic solutions. This strategy not only differentiates us in the market but also creates significant value for our customers by accelerating deployment, improving performance, and reducing complexity across their infrastructure.
At Credo, you'll be part of a team of world-class technologists and engineers that thrive on pushing the limits of what's possible for some of the world's most important companies. Our portfolio includes cutting edge solutions including our software, optical DSPs, PCIe/CXL products, SerDes IP, and advanced Active Electrical Cables (AECs) all designed for maximum performance, energy efficiency, and scalability.
We foster a culture of technical excellence, collaboration, and continuous learning, where your ideas can shape the future of connectivity. From silicon architects to systems engineers, every role at Credo contributes to solving real-world problems at scale.
Join us and help us architect the next generation of disruptive networking technologies - because at Credo, We Connect.
About the Role
As a Principal ASIC Design Engineer, you will be responsible for all aspects of front-end ASIC design, including RTL implementation and verification of complex logic blocks. You will collaborate with PD, DFT, STA, and integration teams to ensure successful tape-outs and work closely with system teams for chip bring-up and validation.
Responsibilities
  • Design, implement, and debug complex logic blocks.
  • Integrate complex IPs from internal and external vendors.
  • Support front-end integration activities such as Lint, CDC, synthesis, and ECO.
  • Participate in design and code reviews to ensure quality.
  • Develop functional tests/testbenches and run RTL and gate-level simulations.
  • Work with verification, DFT, and physical design engineers to achieve successful tape-outs.
  • Bring up, validate, and debug chip features; collaborate with software, firmware, and systems teams.

Basic Qualifications
  • BS/MS degree in Electrical Engineering or Computer Science.
  • 10+ years of relevant ASIC design experience.
  • Strong understanding of digital logic design and complex synchronous/asynchronous interfaces.
  • Proficiency in Verilog/SystemVerilog RTL design.
  • Knowledge of synthesis and static timing analysis.
  • Experience developing testbenches and test cases; familiarity with UVM.
  • Experience with gate-level simulations, chip bring-up, and validation.
  • Proven track record of successful production tape-outs.

Preferred Qualifications
  • Expertise in scripting languages (Python, Tcl, Perl, Shell).
  • Familiarity with DFT methodology and physical design flow.
  • Hands-on experience with STA and timing closure.
  • Strong problem-solving and planning skills.
  • Excellent communication and collaboration abilities.

The base salary range for this position is $180,000 - $210,000 a year. The base salary ultimately offered is determined through a review of education, experience, training, skills, qualifications, and location. This position is also eligible for a discretionary bonus, equity and a full range of medical and other benefits.
Credo is an Equal Opportunity Employer. We are committed to creating an inclusive environment for all employees and welcome applicants from diverse backgrounds without regard to race, color, religion, gender, sex, sexual orientation, national origin, genetic information, age, disability, veteran status, or any other legally protected basis.
If you have a disability or special need that requires accommodation to navigate our website or complete the application process, email people@credosemi.com.