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Ic Layout Design Engineer Jobs in Oregon (NOW HIRING)

Analog Layout Engineer

Beaverton, OR · On-site

$120 - $160/hr

Description Analog Layout engineers are pivotal in delivering Analog Mixed‑Signal IP in a SOC ... You'll run complete sets of design verification tools, plan/schedule work, and coordinate vital ...

Analog Engineer

Hillsboro, OR · On-site

$141K - $269K/yr

... IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and ... layout teams to design circuits that maximize functionality, robustness, and electrical ...

Analog Engineer

Hillsboro, OR · On-site

$142 - $269/hr

... IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and ... Collaborate with architecture and layout teams to design circuits that maximize functionality ...

Design Engineer

Eugene, OR · On-site

$75 - $110/hr

Design Engineer Job family: Engineering Business area: Environment & Energy Contract location ... Experience in drafting/design layout for large industrial equipment Why ANDRITZ? At ANDRITZ, you'll ...

Sr. PCB Design Engineer This Sr. PCB Design Engineer role focuses on end-to-end development of ... Establish layout standards and promote best practices within the PCB design team to improve ...

... layout drawings per instructions and concepts • Create multi-view detailed drawings, models, and ... engineering and design through fabrication and installation. We offer a collaborative work ...

... strategy, design, software engineering and systems integration. Our tightly integrated offerings ... Good Understanding of deep sub-micron layout techniques and issues in CMOS process technology nodes ...

Key Responsibilities: - Design and implement physical layout and routing of silicon interposers and ... Engineering, or a STEM related field Experience listed above should be in the following:

Support PCB layout activities by working with senior engineers to define component placement, routing requirements, and design constraints. * Participate in board bring-up, debugging, and validation ...

Layout Designer

Portland, OR · On-site

$74K - $118K/yr

Senior Facilities Layout & BIM Designer Role Overview We are seeking a Senior Facilities Layout ... the design intent. • Cross-Functional Liaison: Partner with engineering, facilities, and ...

Do you want to utilize your engineering background to make big things happen? Can you influence ... Design experience in advanced tech node device behavior with understanding of layout rules. Design ...

Support PCB layout activities by working with senior engineers to define component placement, routing requirements, and design constraints. * Participate in board bring-up, debugging, and validation ...

... layout on projects for all trades, configurations, and for the CBC, IBC, and UFC. * Product ... of engineering or design experience preferred (open to entry-level with strong aptitude)

Do you want to utilize your engineering background to make big things happen? Can you influence ... Design experience in advanced tech node device behavior with understanding of layout rules. Design ...

Showing results 21-40

Ic Layout Design Engineer information

See Oregon salary details

$47.6K

$127.8K

$196.1K

How much do ic layout design engineer jobs pay per year?

As of Sep 5, 2026, the average yearly pay for ic layout design engineer in Oregon is $127,771.00, according to ZipRecruiter salary data. Most workers in this role earn between $95,200.00 and $152,200.00 per year, depending on experience, location, and employer.

What does an IC layout design engineer do?

An IC Layout Design Engineer is responsible for creating the physical design of integrated circuits (ICs) based on schematic designs. They ensure optimal placement and routing of transistors and interconnections while meeting performance, power, and area constraints. They work closely with circuit designers and verification engineers to ensure manufacturability and compliance with design rules. Tools like Cadence Virtuoso or Mentor Graphics are commonly used in this role.

What are the key skills and qualifications needed to thrive as an IC layout design engineer?

To thrive as an IC Layout Design Engineer, you need strong expertise in analog and/or digital IC layout, semiconductor device physics, and an educational background in electrical engineering or a related field. Familiarity with industry-standard EDA tools such as Cadence Virtuoso, Mentor Graphics, and proficiency with layout verification techniques (like DRC and LVS) are typically required. Exceptional attention to detail, effective communication, and the ability to collaborate closely with circuit design teams are valuable soft skills. These skills are essential to ensure the successful design, optimization, and integration of complex integrated circuits in high-performance environments.

What are the common challenges faced by IC layout design engineers on the job?

IC Layout Design Engineers often encounter challenges such as meeting strict design specification requirements, managing complex circuitry within limited silicon area, and ensuring layouts comply with manufacturing constraints. They may need to troubleshoot and resolve issues with DRC/LVS errors, work under tight project deadlines, and adapt quickly to changes in design parameters. Close collaboration with circuit design engineers and verification teams is common, requiring strong teamwork and effective communication. These challenges make the role dynamic and can provide excellent opportunities to develop specialized skills and advance into lead or principal engineering positions over time.

What are the most commonly searched types of Ic Layout Design Engineer jobs in Oregon?

The most popular types of Ic Layout Design Engineer jobs in Oregon are:

What job categories do people searching Ic Layout Design Engineer jobs in Oregon look for?

The top searched job categories for Ic Layout Design Engineer jobs in Oregon are:

Infographic showing various Ic Layout Design Engineer job openings in Oregon as of August 2026, with employment types broken down into 94% Full Time, and 6% Contract. Highlights an 87% In-person, and 13% Remote job distribution, with an average salary of $127,771 per year, or $61.4 per hour.

Analog Layout Engineer

Apple Inc.

Beaverton, OR • On-site

$120 - $160/hr

Other

Posted 4 days ago


Apple rating

8.1

Company rating: 8.1 out of 10

Based on 681 frontline employees who took The Breakroom Quiz

6th of 30 rated technology retailers


Job description

Description

Analog Layout engineers are pivotal in delivering Analog Mixed‑Signal IP in a SOC flow. You will collaborate with teams of highly skilled individuals to develop the next generation of world‑leading SOCs. Your responsibilities include crafting sophisticated layouts for mixed‑signal and analog circuits, reviewing floorplans, and analyzing intricate circuits with circuit designers. You'll run complete sets of design verification tools, plan/schedule work, and coordinate vital layout tradeoffs. Interpretation of LVS, DRC, and ERC reports is key to finding the fastest way to complete the layout, exceeding engineering specifications and expectations.

Minimum Qualifications
  • BS and a minimum of 10 years relevant industry experience.
Preferred Qualifications
  • 10+ years of experience in analog/mixed‑signal layout design, with a focus on deep submicron CMOS circuits and at least 3+ years in FinFET technologies.
  • Programming/scripting knowledge in SKILL, Perl, TCL, Shell, and/or Python.
  • Familiar with Machine Learning and AI concepts.
  • Experience with ultra‑high speed ADC/DAC.
  • Proven Expertise in implementing analog layout designs, achieving tight matching, low noise, and low power consumption.
  • Must recognize failure‑prone circuit and layout structures, have experience with analog and DFM standards, and be able to identify the best approach to solving problems.
  • High Proficiency in custom and standard cell‑based floor‑planning and hierarchical layout assembly.
  • Technical understanding of IR drop, RC delay, electromigration, self‑heating, and coupling capacitance.
  • High Proficiency in interpreting physical verification reports (DRC, ERC, LVS, etc.).
  • Experience using Cadence Virtuoso's advanced features (XL, EAD, APR, and Constraint Manager).
  • Excellent communication skills and ability to work with cross‑functional teams.
  • Cadence Innovus.
  • PCell creation experience.
  • MSEE or Ph.D. in Electrical and Computer Engineering.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant.

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About Apple

Sourced by ZipRecruiter

Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.

Industry

Computer and electronic product manufacturing

Company size

10,000+ Employees

Headquarters location

Cupertino, CA, US

Year founded

1976