You will collaborate directly with system hardware, software, and clinical engineering teams , medical consultants, and IC design, test, and layout engineers across U.S. and international design ...
You will collaborate directly with system hardware, software, and clinical engineering teams , medical consultants, and IC design, test, and layout engineers across U.S. and international design ...
Memory bit-cell and complex periphery IC layout and automation. * Memory array/IP design, memory ... PhD with 1-2 years of professional experience gained through either internships or full-time ...
Memory bit-cell and complex periphery IC layout and automation. * Memory array/IP design, memory ... PhD with 1-2 years of professional experience gained through either internships or full-time ...
Memory Circuit Design Engineer
Hillsboro, OR ยท On-site
Memory bit-cell and complex periphery IC layout and automation. * Memory array/IP design, memory ... PhD with 1-2 years of professional experience gained through either internships or full-time ...
Memory Circuit Design Engineer
Hillsboro, OR ยท On-site
Memory bit-cell and complex periphery IC layout and automation. * Memory array/IP design, memory ... PhD with 1-2 years of professional experience gained through either internships or full-time ...
Staff IC Design Engineer, Analog
Lake Oswego, OR ยท On-site
$207K/yr
Staff IC Design Engineer, Analog The Staff IC Design Engineer provides advanced technical expertise ... Solid understanding of circuit building blocks and layout techniques for ultra-low-power design ...
Staff IC Design Engineer, Analog
Lake Oswego, OR ยท On-site
$207K/yr
Staff IC Design Engineer, Analog The Staff IC Design Engineer provides advanced technical expertise ... Solid understanding of circuit building blocks and layout techniques for ultra-low-power design ...
Principal IC Design Engineer, Analog
Happy Valley, OR ยท On-site
$212K/yr
The Principal Engineer will collaborate directly with system hardware, software, and clinical engineering teams, medical consultants, and IC design, test, and layout engineers across U.S. and ...
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Principal IC Design Engineer, Analog
Happy Valley, OR ยท On-site
$212K/yr
The Principal Engineer will collaborate directly with system hardware, software, and clinical engineering teams, medical consultants, and IC design, test, and layout engineers across U.S. and ...
Experienced Analog/Mixed Signal IC Design Engineer
Hillsboro, OR ยท On-site
$220K/yr
The candidate must be able to architect, design, layout, measure and productize SiGe and silicon ... Take an IC from concept through to productization * Architect, schematic design, layout, hands-on ...
Experienced Analog/Mixed Signal IC Design Engineer
Hillsboro, OR ยท On-site
$220K/yr
The candidate must be able to architect, design, layout, measure and productize SiGe and silicon ... Take an IC from concept through to productization * Architect, schematic design, layout, hands-on ...
... experience, internship experience and / or schoolwork/classes/research. The preferred ... layout design and CAD engineering experience * Experience with Cadence Allegro PCB design tools ...
... experience, internship experience and / or schoolwork/classes/research. The preferred ... layout design and CAD engineering experience * Experience with Cadence Allegro PCB design tools ...
Senior PCB/CAD Layout Engineer
Hillsboro, OR ยท On-site
... experience, internship experience and / or schoolwork/classes/research. The preferred ... layout design and CAD engineering experience * Experience with Cadence Allegro PCB design tools ...
Senior PCB/CAD Layout Engineer
Hillsboro, OR ยท On-site
... experience, internship experience and / or schoolwork/classes/research. The preferred ... layout design and CAD engineering experience * Experience with Cadence Allegro PCB design tools ...
Analog Engineer
$220K/yr
... IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and ... Collaborate with architecture and layout teams to design circuits that maximize functionality ...
Analog Engineer
$220K/yr
... IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and ... Collaborate with architecture and layout teams to design circuits that maximize functionality ...
Analog Engineer
Hillsboro, OR ยท On-site
$220K/yr
... IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and ... Collaborate with architecture and layout teams to design circuits that maximize functionality ...
Analog Engineer
Hillsboro, OR ยท On-site
$220K/yr
... IC design. As an Analog Circuit Design Engineer, you will be at the forefront of designing and ... Collaborate with architecture and layout teams to design circuits that maximize functionality ...
OR ยท Hybrid
... in the design and development of sophisticated, detailed layout of IC substrates for NVIDIA ... Electrical Engineering or equivalent experience * 5+ years experience in PCB Layout of graphics ...
Senior Testchip SoC Physical Design Engineer (Integration & Methodology)
Hillsboro, OR ยท On-site
$141K - $200K/yr
Developing layout design methodology for testchip development in next generation process nodes ... Master's degree in electrical engineering or related field with minimum of 5 years of experience in ...
Senior Testchip SoC Physical Design Engineer (Integration & Methodology)
Hillsboro, OR ยท On-site
$141K - $200K/yr
Developing layout design methodology for testchip development in next generation process nodes ... Master's degree in electrical engineering or related field with minimum of 5 years of experience in ...
Sr High-Speed SerDes Design Engineer (Remote - USA)
Hillsboro, OR ยท On-site +1
$135K - $165K/yr
Collaborate closely with layout, digital design, validation, and system engineering teams ... IC design experience. * Strong expertise in High-Speed SerDes, PLL, TX/RX circuits, and CDR design.
Sr High-Speed SerDes Design Engineer (Remote - USA)
Hillsboro, OR ยท On-site +1
$135K - $165K/yr
Collaborate closely with layout, digital design, validation, and system engineering teams ... IC design experience. * Strong expertise in High-Speed SerDes, PLL, TX/RX circuits, and CDR design.
Sr High-Speed SerDes Design Engineer (Remote - USA)
Hillsboro, OR ยท Remote
$135K - $165K/yr
Collaborate closely with layout, digital design, validation, and system engineering teams ... IC design experience. * Strong expertise in High-Speed SerDes, PLL, TX/RX circuits, and CDR design.
New
Quick apply
Sr High-Speed SerDes Design Engineer (Remote - USA)
Hillsboro, OR ยท Remote
$135K - $165K/yr
Collaborate closely with layout, digital design, validation, and system engineering teams ... IC design experience. * Strong expertise in High-Speed SerDes, PLL, TX/RX circuits, and CDR design.
New
Developing layout design methodology for testchip development in next generation process nodes ... Master's degree in electrical engineering or related field with minimum of 5 years of experience in ...
Developing layout design methodology for testchip development in next generation process nodes ... Master's degree in electrical engineering or related field with minimum of 5 years of experience in ...
Design Engineer
Eugene, OR ยท On-site
Brief Description The Design Engineer is responsible for designing and detailing large industrial ... layout drawings per instructions and concepts Create multi-view detailed drawings, models, and ...
Design Engineer
Eugene, OR ยท On-site
Brief Description The Design Engineer is responsible for designing and detailing large industrial ... layout drawings per instructions and concepts Create multi-view detailed drawings, models, and ...
Sr. PCB Design Engineer --- This Sr. PCB Design Engineer role focuses on end-to-end development of ... Establish layout standards and promote best practices within the PCB design team to improve ...
Quick apply
Sr. PCB Design Engineer --- This Sr. PCB Design Engineer role focuses on end-to-end development of ... Establish layout standards and promote best practices within the PCB design team to improve ...
... strategy, design, software engineering and systems integration. Our tightly integrated offerings ... Good Understanding of deep sub-micron layout techniques and issues in CMOS process technology nodes ...
... strategy, design, software engineering and systems integration. Our tightly integrated offerings ... Good Understanding of deep sub-micron layout techniques and issues in CMOS process technology nodes ...
Key Responsibilities: - Design and implement physical layout and routing of silicon interposers and ... Engineering, or a STEM related field Experience listed above should be in the following:
Key Responsibilities: - Design and implement physical layout and routing of silicon interposers and ... Engineering, or a STEM related field Experience listed above should be in the following:
Analog/Mixed-Signal Circuit Design Engineer
Beaverton, OR ยท On-site
$210K/yr
We have an opportunity for a forward-thinking analog/mixed-signal engineer with background in ... IC development from definition to high-volume production including layout supervision, bench ...
Analog/Mixed-Signal Circuit Design Engineer
Beaverton, OR ยท On-site
$210K/yr
We have an opportunity for a forward-thinking analog/mixed-signal engineer with background in ... IC development from definition to high-volume production including layout supervision, bench ...
Internship Ic Layout Design Engineer information
What is the difference between Internship Ic Layout Design Engineer vs IC Design Engineer?
| Aspect | Internship IC Layout Design Engineer | IC Design Engineer |
|---|---|---|
| Credentials | Typically pursuing or recently completed relevant degree; internship experience | Bachelor's or Master's in Electrical/Electronic Engineering; professional experience preferred |
| Work Environment | Internship programs, entry-level tasks, supervised environment | Full-time professional role, independent project work, team collaboration |
| Responsibilities | Assisting in layout design, learning design tools, supporting senior engineers | Designing, simulating, and verifying integrated circuit layouts independently |
In summary, an Internship IC Layout Design Engineer is a trainee gaining hands-on experience under supervision, while an IC Design Engineer is a full-time professional responsible for designing and verifying integrated circuits independently.
Full-time
Posted 29 days ago
Job description
Please join us as:
Principal IC Design Engineer, Analog
Our elite PDX IC Design group is looking for a Principal Analog IC Design Engineer to lead and personally contribute to the innovation, design, and development of ultra-low-power analog and mixed-signal integrated circuits used in life-critical implantable medical devices.
In this role, you will provide technical leadership and hands-on contributions across all phases of product development, from early market and clinical definition through design, release, and long-term maintenance. You will bring broad, cross-disciplinary expertise beyond IC design, working closely with research, manufacturing, quality, testing, and clinical teams to deliver highly reliable silicon that meets stringent medical and regulatory requirements.
Your success will be measured by the on-time delivery of product-specific integrated circuits that address key clinical and business needs while exceeding industry standards for performance, reliability, and quality. Using state-of-the-art CAD and simulation tools, you will design, integrate, and verify complex circuits and systems, influencing architecture decisions and critical design tradeoffs.
You will collaborate directly with system hardware, software, and clinical engineering teams, medical consultants, and IC design, test, and layout engineers across U.S. and international design centers, playing a pivotal role in bringing advanced implantable technologies from concept to production.
PRIMARY RESPONSIBILITIES
- Design and development of high-performance and high-reliability ultra-low power analog but also mixed signal integrated circuits for implantable medical products.
- Active involvement in all aspects of IC design, including the development of functional concepts and specifications, top-level design architecture, design partitioning and block level design, detailed circuit design and simulation, layout floor-planning and transistor level layout, bench verification and testing, test-vector development, and documentation.
- Design of novel, robust, ultra-low power, low-voltage analog/mixed-signal IC functional blocks including but not limited to voltage/current references, operational amplifiers, comparators, switched-capacitor circuits (amplifiers, filters, charge pumps, etc.), ADCs and DACs, oscillators, switching power circuits, communication circuits, etc.
- Design of ultra-low power digital functional blocks (combinatorial, sequential, synchronous, asynchronous, state machines, etc.) for timing, control, interfacing and signal processing.
- Create behavioral models for modules and system level verification models for circuits. Perform pre-silicon verification and post-silicon validation of circuits. Collaborate with IC Test group to define production vectors.
- Consult with physicians, clinical research, published literature, and technology leaders on new and existing technologies, trends, and requirements for their uses.
QUALIFICATIONS AND EXPERIENCE
- Advanced degree in Electrical Engineering (MS / PhD) with additional background in business principles with demonstrated expertise in fundamental electrical engineering, circuit, and systems principles and closed form analytical approaches.
- The candidate should be a self-motivated independent thinker able to apply industry research and personal experience to design proposals combined with strong verbal communications skill and strong technical document writing skills.
- 8+ years of experience in analog/mixed-signal IC design for very low power portable and/or implantable applications, with a strong grasp of the tradeoffs involved in using various analog and digital circuit design techniques (RTL or schematic based) to optimally implement system functions. Preferred: 5+ years implantable medical device industry experience including FDA regulated design controls and product approval process.
- Deep understanding of CMOS processes, device characteristics and models, transistor level circuit analysis and design concepts and trade-offs: BW, noise, power, feedback analysis, stability etc., worst case process corners, margin and Monte Carlo analysis, and design-for-test. Knowledge of low power flows, including voltage/power domains, power shutoff, retention is desired
- Solid understanding of circuit building blocks (op-amps, comparators, voltage and current references, DACs, ADCs,) and layout techniques for ultra-low power design to deliver robust, production quality silicon designs. Preferred: Experience with medical domain specific designs such as neuromodulation, charging, low noise biomedical signal measurement and processing, battery energy conversion techniques, and very low power RF communication circuits.
- Extensive working knowledge and use of Cadence mixed signal Design tools, Virtuoso XL, Spectre, Xcelium/AMS simulators along with Maestro, and other mixed signal signoff tools for analog regression testing. Preferred: Knowledge of scripting/language (perl, shell, tcl, python) along with C/C++, as well Matlab is desirable
- Experience in lab bench characterization and test-vector generation for pre-silicon and post-silicon verification, design-for-manufacturing test vector generation, production support, fault isolation and failure analysis, and pre-clinical and clinical testing environments.
- The candidate would demonstrate industry recognition of technical accomplishments in the form of patents and/or published articles. Preferred: Experience with international teams and a working knowledge of German would be highly desirable.
PHYSICAL AND TRAVEL REQUIREMENTS
The physical demands described within the Responsibilities section of this job description are representative of those that must be met by an employee to successfully perform the essential functions of this job. Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions.
- While performing the duties of this job, the employee is regularly required to be independently mobile.
- The employee is also required to interact with a computer for extended periods of time and communicate with co-workers.
- Must be able to work a minimum of 40 hours / week.
- Must be able to travel to other office locations.
- Must be able to travel internationally and domestically, less than 5% of the time.
Location: Lake Oswego(0001)
Working hours: Full-time
Oregon (US-OR)
Job ID: 62053
Micro Systems Engineering, Inc. is an equal opportunity employer. In accordance with applicable law, the company prohibits discrimination based on race, color, religion, creed, gender, pregnancy or related medical conditions, age, national origin or ancestry, physical or mental disability, sexual orientation, genetic information, uniformed service or any other consideration protected by federal state and local laws. Our commitment to equal opportunity employment applies to all persons involved in our operations and prohibits unlawful discrimination by any employee.