... both RTL design and testing/integration. If you'd like to learn more, you can read about our ... Comfortable with a software programming language * Experienced with a Hardware Description (or ...
... both RTL design and testing/integration. If you'd like to learn more, you can read about our ... Comfortable with a software programming language * Experienced with a Hardware Description (or ...
Senior Engineer, Digital Design Engineering
Somerset, NJ · On-site
$127K - $175K/yr
... RTL, Standard cells, and similar approaches as necessary for both mixed signal ASIC and FPGA ... Digital Design Engineer or related occupation performing digital or mixed signal design and ...
Senior Engineer, Digital Design Engineering
Somerset, NJ · On-site
$127K - $175K/yr
... RTL, Standard cells, and similar approaches as necessary for both mixed signal ASIC and FPGA ... Digital Design Engineer or related occupation performing digital or mixed signal design and ...
Senior Engineer, Digital Design Engineering
Somerset, NJ · On-site
$127K - $175K/yr
... RTL, Standard cells, and similar approaches as necessary for both mixed signal ASIC and FPGA ... Digital Design Engineer or related occupation performing digital or mixed signal design and ...
Senior Engineer, Digital Design Engineering
Somerset, NJ · On-site
$127K - $175K/yr
... RTL, Standard cells, and similar approaches as necessary for both mixed signal ASIC and FPGA ... Digital Design Engineer or related occupation performing digital or mixed signal design and ...
THW Client Co-op
New York, NY · On-site
$27 - $37.50/hr
RTL design and verification of digital blocks, cores, and subsystems for ASIC products and FPGA ... Engineering - Previous experience with ASIC or FPGA development, as well as knowledge of and ...
THW Client Co-op
New York, NY · On-site
$27 - $37.50/hr
RTL design and verification of digital blocks, cores, and subsystems for ASIC products and FPGA ... Engineering - Previous experience with ASIC or FPGA development, as well as knowledge of and ...
ASIC Engineer
Dobbs Ferry, NY · On-site
$90 - $130/hr
As part of a project team you will work alongside Senior ASIC Engineers; supporting the design ... Experience in RTL coding and debug, as well as performance, power, area analysis and trade-offs
ASIC Engineer
Dobbs Ferry, NY · On-site
$90 - $130/hr
As part of a project team you will work alongside Senior ASIC Engineers; supporting the design ... Experience in RTL coding and debug, as well as performance, power, area analysis and trade-offs
Two Sigma Securities, Hardware Engineer
New York, NY · On-site
$165K - $300K/yr
... preferred in RTL design and verification for ASIC or FPGA * BS or MS in Computer Science ... Engineering, or a related field * Strong RTL design, optimization, and debugging skills, with ...
Two Sigma Securities, Hardware Engineer
New York, NY · On-site
$165K - $300K/yr
... preferred in RTL design and verification for ASIC or FPGA * BS or MS in Computer Science ... Engineering, or a related field * Strong RTL design, optimization, and debugging skills, with ...
FPGA Design Engineer
Hoboken, NJ · On-site
$134K - $185K/yr
FPGA Design Engineer Location: Hoboken, NJ Division : Technology Department: Engineering Reports to ... Develop RTL code for use within multiple projects. Analyze and enhance efficiency, scalability, and ...
FPGA Design Engineer
Hoboken, NJ · On-site
$134K - $185K/yr
FPGA Design Engineer Location: Hoboken, NJ Division : Technology Department: Engineering Reports to ... Develop RTL code for use within multiple projects. Analyze and enhance efficiency, scalability, and ...
FPGA Design Engineer
Hoboken, NJ · On-site
$134K - $185K/yr
FPGA Design Engineer Location: Hoboken, NJ Division : Technology Department: Engineering Reports to ... Develop RTL code for use within multiple projects. Analyze and enhance efficiency, scalability, and ...
FPGA Design Engineer
Hoboken, NJ · On-site
$134K - $185K/yr
FPGA Design Engineer Location: Hoboken, NJ Division : Technology Department: Engineering Reports to ... Develop RTL code for use within multiple projects. Analyze and enhance efficiency, scalability, and ...
Hardware Engineer
New York, NY · On-site
$135K - $178K/yr
We are looking for a hardware engineer to join our high frequency trading technology team ... Architect and implement FPGA applications (RTL design, synthesis, place & route, timing closure)
Hardware Engineer
New York, NY · On-site
$135K - $178K/yr
We are looking for a hardware engineer to join our high frequency trading technology team ... Architect and implement FPGA applications (RTL design, synthesis, place & route, timing closure)
Hardware Engineer
New York, NY · On-site
$135K - $178K/yr
We are looking for a hardware engineer to join our high frequency trading technology team ... Responsibilities: • Architect and implement FPGA applications (RTL design, synthesis, place ...
Hardware Engineer
New York, NY · On-site
$135K - $178K/yr
We are looking for a hardware engineer to join our high frequency trading technology team ... Responsibilities: • Architect and implement FPGA applications (RTL design, synthesis, place ...
FPGA DESIGN ENGINEER
Warren, NJ · On-site
$127K - $176K/yr
Airspan Careers FPGA DESIGN ENGINEER Location: Warren, New Jersey or Plano, TX, Remote possible if ... Develop RTL designs in Verilog/System Verilog , ensuring efficient and high-performance ...
FPGA DESIGN ENGINEER
Warren, NJ · On-site
$127K - $176K/yr
Airspan Careers FPGA DESIGN ENGINEER Location: Warren, New Jersey or Plano, TX, Remote possible if ... Develop RTL designs in Verilog/System Verilog , ensuring efficient and high-performance ...
FPGA Engineer (Intern)
$107.50 - $120/hr
FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience ...
FPGA Engineer (Intern)
$107.50 - $120/hr
FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience ...
FPGA Engineer (Intern)
Manhattan, NY · On-site
$4.3K - $4.8K/wk
FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience ...
FPGA Engineer (Intern)
Manhattan, NY · On-site
$4.3K - $4.8K/wk
FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience ...
Must have a strong background in technical disciplines relating to ASIC design with emphasis on ... analysis for RTL, mask layout * Lab skills and hands-on experience with test equipment.
Must have a strong background in technical disciplines relating to ASIC design with emphasis on ... analysis for RTL, mask layout * Lab skills and hands-on experience with test equipment.
Engineer II - Design
Hauppauge, NY · On-site
As part of our seasoned ASIC design team, you will work on processor based products that go into ... Programming languages like C, Python, Perl, TCL. Self-starter and team player attitude Willingness ...
Engineer II - Design
Hauppauge, NY · On-site
As part of our seasoned ASIC design team, you will work on processor based products that go into ... Programming languages like C, Python, Perl, TCL. Self-starter and team player attitude Willingness ...
Vice President
New York, NY · On-site
SmartSoC combines deep silicon engineering expertise with Virtusa's global delivery capabilities ... full ASIC and SoC development lifecycle - from architecture definition and RTL design through ...
Vice President
New York, NY · On-site
SmartSoC combines deep silicon engineering expertise with Virtusa's global delivery capabilities ... full ASIC and SoC development lifecycle - from architecture definition and RTL design through ...
Vice President
New York, NY · On-site
SmartSoC combines deep silicon engineering expertise with Virtusa's global delivery capabilities ... full ASIC and SoC development lifecycle - from architecture definition and RTL design through ...
Vice President
New York, NY · On-site
SmartSoC combines deep silicon engineering expertise with Virtusa's global delivery capabilities ... full ASIC and SoC development lifecycle - from architecture definition and RTL design through ...
Vice President
New York, NY · On-site
SmartSoC combines deep silicon engineering expertise with Virtusa's global delivery capabilities ... full ASIC and SoC development lifecycle - from architecture definition and RTL design through ...
Vice President
New York, NY · On-site
SmartSoC combines deep silicon engineering expertise with Virtusa's global delivery capabilities ... full ASIC and SoC development lifecycle - from architecture definition and RTL design through ...
Freelance - Open application (Remote)
Manhattan, NY · On-site +1
RoAndCo is a multi-disciplinary design studio devoted to holistic branding that serves a range of ... Developers
Freelance - Open application (Remote)
Manhattan, NY · On-site +1
RoAndCo is a multi-disciplinary design studio devoted to holistic branding that serves a range of ... Developers
RoAndCo is a multi-disciplinary design studio devoted to holistic branding that serves a range of ... Developers Employment Type: CONTRACTOR
RoAndCo is a multi-disciplinary design studio devoted to holistic branding that serves a range of ... Developers Employment Type: CONTRACTOR
Freelance Asic Rtl Design Engineer information
How much does a Freelance ASIC RTL Design Engineer make?
Freelance ASIC RTL Design Engineers typically earn between $50 and $150 per hour, depending on experience, project complexity, and location. Rates can vary based on expertise in hardware description languages like Verilog or VHDL and familiarity with FPGA or ASIC design tools.
Are freelance ASIC RTL design engineers in demand?
Freelance ASIC RTL design engineers are in demand due to the growing need for custom chip development in industries like telecommunications, AI, and consumer electronics. Skills in hardware description languages such as Verilog or VHDL, along with experience in FPGA prototyping, enhance employability in this competitive field.
What are the most commonly searched types of Asic Rtl Design Engineer jobs in New York? The most popular types of Asic Rtl Design Engineer jobs in New York are:
What are popular job titles related to Freelance Asic Rtl Design Engineer jobs in New York? For Freelance Asic Rtl Design Engineer jobs in New York, the most frequently searched job titles are:
What job categories do people searching Freelance Asic Rtl Design Engineer jobs in New York look for? The top searched job categories for Freelance Asic Rtl Design Engineer jobs in New York are:
What cities in New York are hiring for Freelance Asic Rtl Design Engineer jobs? Cities in New York with the most Freelance Asic Rtl Design Engineer job openings:
Job description
About the Position
Our goal is to give you a real sense of what it's like to work at Jane Street full time while also providing a truly unparalleled educational experience. As an intern, you are paired with full-time employees who act as mentors, collaborating with you on real-world projects we actually need done.
In this internship, you'll learn how we use tools to make programming faster, more pleasant, and more reliable. We apply these same principles to our hardware engineering work, and we're looking for people who are interested in using programming language technology to improve the process of designing, testing, and validating hardware designs. We use Hardcaml, an OCaml library for succinctly describing hardware in RTL. Hardcaml is tightly integrated into our development environment, so you'll also gain lots of exposure to the libraries and tools that are foundational to our internal systems. No previous knowledge of Hardcaml is required.
The hardware team at Jane Street works on both FPGA and ASIC designs. Depending on your background and experience, we'll craft a project that gives you exposure to our shared Hardcaml tech stack, as well as targeting an FPGA or ASIC platform.
During the program, you'll dive deep on one project, mentored closely by the full-time employees who helped design it. Some intern projects consider big-picture questions that we're still trying to figure out, while others involve building something new. Your mentors will help you gain a better understanding of the wide range of problems we solve every day. We expect interns to build hardware applications from concept to a working design; your projects will predominantly involve OCaml & Hardcaml, for both RTL design and testing/integration.
If you'd like to learn more, you can read about our interview process, meet some of our newest hires, or check out our OCaml All The Way Down talk and Programmable Hardware podcast episode. You can also learn more about Jane Street's internship program here.
About You
We don't expect you to have a background in finance, OCaml, functional programming, or any other specific field- we're looking for smart people who enjoy solving interesting problems. We're more interested in how you think and learn than what you currently know. You should be:
If you're a recruiting agency and want to partner with us, please reach out to agency-partnerships@janestreet.com.
Our goal is to give you a real sense of what it's like to work at Jane Street full time while also providing a truly unparalleled educational experience. As an intern, you are paired with full-time employees who act as mentors, collaborating with you on real-world projects we actually need done.
In this internship, you'll learn how we use tools to make programming faster, more pleasant, and more reliable. We apply these same principles to our hardware engineering work, and we're looking for people who are interested in using programming language technology to improve the process of designing, testing, and validating hardware designs. We use Hardcaml, an OCaml library for succinctly describing hardware in RTL. Hardcaml is tightly integrated into our development environment, so you'll also gain lots of exposure to the libraries and tools that are foundational to our internal systems. No previous knowledge of Hardcaml is required.
The hardware team at Jane Street works on both FPGA and ASIC designs. Depending on your background and experience, we'll craft a project that gives you exposure to our shared Hardcaml tech stack, as well as targeting an FPGA or ASIC platform.
During the program, you'll dive deep on one project, mentored closely by the full-time employees who helped design it. Some intern projects consider big-picture questions that we're still trying to figure out, while others involve building something new. Your mentors will help you gain a better understanding of the wide range of problems we solve every day. We expect interns to build hardware applications from concept to a working design; your projects will predominantly involve OCaml & Hardcaml, for both RTL design and testing/integration.
If you'd like to learn more, you can read about our interview process, meet some of our newest hires, or check out our OCaml All The Way Down talk and Programmable Hardware podcast episode. You can also learn more about Jane Street's internship program here.
About You
We don't expect you to have a background in finance, OCaml, functional programming, or any other specific field- we're looking for smart people who enjoy solving interesting problems. We're more interested in how you think and learn than what you currently know. You should be:
- Comfortable with a software programming language
- Experienced with a Hardware Description (or Construction) language (VHDL, Verilog, Chisel, Pymtl, or other), for both writing and testing hardware designs
- Experienced working with FPGA or ASIC vendor tools - Vivado or Quartus for FPGAs, Genus or Innovus for ASICs
- Experienced with building a working hardware project (either FPGA or ASIC) through an academic, professional, or personal project
- Interested in learning how to use FPGAs or ASICs in the context of networking
If you're a recruiting agency and want to partner with us, please reach out to agency-partnerships@janestreet.com.
About Jane Street
Sourced by ZipRecruiter
Industry
Finance and insurance
Company size
1,001 - 5,000 Employees
Headquarters location
New York, NY, US
Year founded
2000