ASIC Engineer
$181.60K/yr
Have 4+ years practical experience in RTL design and verification * Experienced in ASIC design ... Interested in using software engineering techniques to improve the hardware design process, and ...
$181.60K/yr
Have 4+ years practical experience in RTL design and verification * Experienced in ASIC design ... Interested in using software engineering techniques to improve the hardware design process, and ...
$181.60K/yr
Have 4+ years practical experience in RTL design and verification * Experienced in ASIC design ... Interested in using software engineering techniques to improve the hardware design process, and ...
New York, NY · On-site
$181.60K/yr
Have 4+ years practical experience in RTL design and verification * Experienced in ASIC design ... Interested in using software engineering techniques to improve the hardware design process, and ...
New York, NY · On-site
$181.60K/yr
Have 4+ years practical experience in RTL design and verification * Experienced in ASIC design ... Interested in using software engineering techniques to improve the hardware design process, and ...
New York, NY · On-site +1
$115 - $200/hr
... silicon engineering workflows. This role supports current and upcoming remote consulting ... Identify logic issues, integration gaps, unclear tradeoffs, and expected RTL design outcomes ASIC ...
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New York, NY · On-site +1
$115 - $200/hr
... silicon engineering workflows. This role supports current and upcoming remote consulting ... Identify logic issues, integration gaps, unclear tradeoffs, and expected RTL design outcomes ASIC ...
$143.70K/yr
... for ASIC/SoC, with track record of successful tapeouts. * Expertise in RTL design (SystemVerilog), logic synthesis, and digital verification methodologies with Cadence tools. * Experience with ...
$143.70K/yr
... for ASIC/SoC, with track record of successful tapeouts. * Expertise in RTL design (SystemVerilog), logic synthesis, and digital verification methodologies with Cadence tools. * Experience with ...
Somerset, NJ · On-site
$143.70K/yr
... for ASIC/SoC, with track record of successful tapeouts. * Expertise in RTL design (SystemVerilog), logic synthesis, and digital verification methodologies with Cadence tools. * Experience with ...
Somerset, NJ · On-site
$143.70K/yr
... for ASIC/SoC, with track record of successful tapeouts. * Expertise in RTL design (SystemVerilog), logic synthesis, and digital verification methodologies with Cadence tools. * Experience with ...
New York, NY · On-site
$148.80K - $153.20K/yr
About the Position We are looking to hire an ASIC Physical Design Engineer to help us design, test ... You should be comfortable owning a PD flow end-to-end, but also able to read and write RTL and ...
New York, NY · On-site
$148.80K - $153.20K/yr
About the Position We are looking to hire an ASIC Physical Design Engineer to help us design, test ... You should be comfortable owning a PD flow end-to-end, but also able to read and write RTL and ...
$148.80K - $153.20K/yr
About the Position We are looking to hire an ASIC Physical Design Engineer to help us design, test ... You should be comfortable owning a PD flow end-to-end, but also able to read and write RTL and ...
$148.80K - $153.20K/yr
About the Position We are looking to hire an ASIC Physical Design Engineer to help us design, test ... You should be comfortable owning a PD flow end-to-end, but also able to read and write RTL and ...
Position: RTL Design Engineers Type: Contract Compensation: $100-$175/hour Location: Remote ... Experience with ASIC design flows and common EDA tools . * Ability to write clear design ...
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Position: RTL Design Engineers Type: Contract Compensation: $100-$175/hour Location: Remote ... Experience with ASIC design flows and common EDA tools . * Ability to write clear design ...
Somerset, NJ · On-site
$127.17K - $175.44K/yr
... RTL, Standard cells, and similar approaches as necessary for both mixed signal ASIC and FPGA ... Digital Design Engineer or related occupation performing digital or mixed signal design and ...
Somerset, NJ · On-site
$127.17K - $175.44K/yr
... RTL, Standard cells, and similar approaches as necessary for both mixed signal ASIC and FPGA ... Digital Design Engineer or related occupation performing digital or mixed signal design and ...
Somerset, NJ · On-site
$127.17K - $175.44K/yr
... RTL, Standard cells, and similar approaches as necessary for both mixed signal ASIC and FPGA ... Digital Design Engineer or related occupation performing digital or mixed signal design and ...
Somerset, NJ · On-site
$127.17K - $175.44K/yr
... RTL, Standard cells, and similar approaches as necessary for both mixed signal ASIC and FPGA ... Digital Design Engineer or related occupation performing digital or mixed signal design and ...
New York, NY · On-site +1
$100/hr
Electrical Engineering Expert (Semiconductor / ASIC / RFIC) Type: Contract Compensation: $100/hour ... ASIC/Physical Design (RTL, synthesis, STA, floorplanning, CTS, PnR, ECO flows) Preferred
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New York, NY · On-site +1
$100/hr
Electrical Engineering Expert (Semiconductor / ASIC / RFIC) Type: Contract Compensation: $100/hour ... ASIC/Physical Design (RTL, synthesis, STA, floorplanning, CTS, PnR, ECO flows) Preferred
$135.40K - $165.20K/yr
Exposure to RTL design, software development, formal verification, or other related domains. Good ... Coordinate with RTL engineers to implement logic design for better clock gating and verify the ...
$135.40K - $165.20K/yr
Exposure to RTL design, software development, formal verification, or other related domains. Good ... Coordinate with RTL engineers to implement logic design for better clock gating and verify the ...
Hoboken, NJ · On-site
$134.60K - $185.40K/yr
FPGA Design Engineer Location: Hoboken, NJ Division : Technology Department: Engineering Reports to ... Develop RTL code for use within multiple projects. Analyze and enhance efficiency, scalability, and ...
Hoboken, NJ · On-site
$134.60K - $185.40K/yr
FPGA Design Engineer Location: Hoboken, NJ Division : Technology Department: Engineering Reports to ... Develop RTL code for use within multiple projects. Analyze and enhance efficiency, scalability, and ...
Hoboken, NJ · On-site
$134.60K - $185.40K/yr
FPGA Design Engineer Location: Hoboken, NJ Division : Technology Department: Engineering Reports to ... Develop RTL code for use within multiple projects. Analyze and enhance efficiency, scalability, and ...
Hoboken, NJ · On-site
$134.60K - $185.40K/yr
FPGA Design Engineer Location: Hoboken, NJ Division : Technology Department: Engineering Reports to ... Develop RTL code for use within multiple projects. Analyze and enhance efficiency, scalability, and ...
New York, NY · On-site
$135.10K - $178.30K/yr
We are looking for a hardware engineer to join our high frequency trading technology team ... Responsibilities: • Architect and implement FPGA applications (RTL design, synthesis, place ...
New York, NY · On-site
$135.10K - $178.30K/yr
We are looking for a hardware engineer to join our high frequency trading technology team ... Responsibilities: • Architect and implement FPGA applications (RTL design, synthesis, place ...
$135.10K - $178.30K/yr
We are looking for a hardware engineer to join our high frequency trading technology team ... Architect and implement FPGA applications (RTL design, synthesis, place & route, timing closure)
$135.10K - $178.30K/yr
We are looking for a hardware engineer to join our high frequency trading technology team ... Architect and implement FPGA applications (RTL design, synthesis, place & route, timing closure)
Warren, NJ · On-site
$127.70K - $176K/yr
Airspan Careers FPGA DESIGN ENGINEER Location: Warren, New Jersey or Plano, TX, Remote possible if ... Develop RTL designs in Verilog/System Verilog , ensuring efficient and high-performance ...
Warren, NJ · On-site
$127.70K - $176K/yr
Airspan Careers FPGA DESIGN ENGINEER Location: Warren, New Jersey or Plano, TX, Remote possible if ... Develop RTL designs in Verilog/System Verilog , ensuring efficient and high-performance ...
Electrical Engineering Expert (Semiconductor / ASIC / RFIC) Type: Contract Compensation: $100/hour ... ASIC/Physical Design (RTL, synthesis, STA, floorplanning, CTS, PnR, ECO flows) Preferred
Quick apply
Electrical Engineering Expert (Semiconductor / ASIC / RFIC) Type: Contract Compensation: $100/hour ... ASIC/Physical Design (RTL, synthesis, STA, floorplanning, CTS, PnR, ECO flows) Preferred
$4.30K - $4.80K/wk
FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience ...
$4.30K - $4.80K/wk
FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience ...
$142.20K - $182.70K/yr
Your day-to-day work will predominantly involve OCaml & Hardcaml, for both RTL design and testing ... A top-notch programmer with a love for technology * Comfortable with a software programming ...
$142.20K - $182.70K/yr
Your day-to-day work will predominantly involve OCaml & Hardcaml, for both RTL design and testing ... A top-notch programmer with a love for technology * Comfortable with a software programming ...
| Aspect | Temporary Asic Rtl Design Engineer | Temporary FPGA Design Engineer |
|---|---|---|
| Primary Focus | Designing RTL code for ASIC chips | Designing FPGA logic and configurations |
| Skills & Certifications | Verilog/VHDL, ASIC design flow, simulation tools | Verilog/VHDL, FPGA development tools, synthesis |
| Work Environment | Semiconductor companies, ASIC design teams | FPGA development labs, prototyping environments |
| Industry Usage | Used in high-volume chip manufacturing | Used for prototyping, testing, and low-volume products |
Both roles involve RTL design using Verilog or VHDL, but the Temporary Asic Rtl Design Engineer focuses on ASIC chip development, while the Temporary FPGA Design Engineer specializes in FPGA-based prototyping and testing. The choice depends on whether the project aims for mass production or flexible, rapid development.
We are looking to hire an experienced ASIC Engineer to help us design, test and deploy advanced hardware designs. As part of our Ultra Low Latency team, you'll have the opportunity to collaborate with people in areas across the firm, including trading, networking and research infrastructure. We are looking for someone who can contribute to all of our projects and be happy to work on both FPGA-based and ASIC-based technologies.
We're big believers in the ability of tools to improve the productivity, reliability and day-to-day joy of hardware engineering. That's why we created Hardcaml, a hardware development toolchain embedded in OCaml. We don't expect you to know OCaml (we'll teach you here), but we are looking for hardware engineers who are excited about the advantages that better tools can bring, and are willing to try new things as a result.
About YouIf you're a recruiting agency and want to partner with us, please reach out to agency-partnerships@janestreet.com.
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Finance and insurance
1,001 - 5,000 Employees
New York, NY, US
2000