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Temporary Asic Rtl Design Engineer Jobs in New York

ASIC Engineer

New York, NY

$181.60K/yr

Have 4+ years practical experience in RTL design and verification * Experienced in ASIC design ... Interested in using software engineering techniques to improve the hardware design process, and ...

ASIC Engineer

New York, NY · On-site

$181.60K/yr

Have 4+ years practical experience in RTL design and verification * Experienced in ASIC design ... Interested in using software engineering techniques to improve the hardware design process, and ...

Digital Design Engineer

Somerset, NJ

$143.70K/yr

... for ASIC/SoC, with track record of successful tapeouts. * Expertise in RTL design (SystemVerilog), logic synthesis, and digital verification methodologies with Cadence tools. * Experience with ...

Digital Design Engineer

Somerset, NJ · On-site

$143.70K/yr

... for ASIC/SoC, with track record of successful tapeouts. * Expertise in RTL design (SystemVerilog), logic synthesis, and digital verification methodologies with Cadence tools. * Experience with ...

ASIC Physical Design Engineer

New York, NY · On-site

$148.80K - $153.20K/yr

About the Position We are looking to hire an ASIC Physical Design Engineer to help us design, test ... You should be comfortable owning a PD flow end-to-end, but also able to read and write RTL and ...

ASIC Physical Design Engineer

New York, NY

$148.80K - $153.20K/yr

About the Position We are looking to hire an ASIC Physical Design Engineer to help us design, test ... You should be comfortable owning a PD flow end-to-end, but also able to read and write RTL and ...

FPGA Design Engineer

Hoboken, NJ · On-site

$134.60K - $185.40K/yr

FPGA Design Engineer Location: Hoboken, NJ Division : Technology Department: Engineering Reports to ... Develop RTL code for use within multiple projects. Analyze and enhance efficiency, scalability, and ...

FPGA Design Engineer

Hoboken, NJ · On-site

$134.60K - $185.40K/yr

FPGA Design Engineer Location: Hoboken, NJ Division : Technology Department: Engineering Reports to ... Develop RTL code for use within multiple projects. Analyze and enhance efficiency, scalability, and ...

Hardware Engineer

New York, NY · On-site

$135.10K - $178.30K/yr

We are looking for a hardware engineer to join our high frequency trading technology team ... Responsibilities: • Architect and implement FPGA applications (RTL design, synthesis, place ...

Hardware Engineer

New York, NY

$135.10K - $178.30K/yr

We are looking for a hardware engineer to join our high frequency trading technology team ... Architect and implement FPGA applications (RTL design, synthesis, place & route, timing closure)

FPGA DESIGN ENGINEER

Warren, NJ · On-site

$127.70K - $176K/yr

Airspan Careers FPGA DESIGN ENGINEER Location: Warren, New Jersey or Plano, TX, Remote possible if ... Develop RTL designs in Verilog/System Verilog , ensuring efficient and high-performance ...

FPGA Engineers work closely with business leaders to design and deploy FPGA solutions that help ... Experienced in RTL Design (SystemVerilog preferred). Python, C, Tcl, and Bash a plus. * Experience ...

FPGA Engineer

New York, NY

$142.20K - $182.70K/yr

Your day-to-day work will predominantly involve OCaml & Hardcaml, for both RTL design and testing ... A top-notch programmer with a love for technology * Comfortable with a software programming ...

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Temporary Asic Rtl Design Engineer information

What is the difference between Temporary Asic Rtl Design Engineer vs Temporary FPGA Design Engineer?

AspectTemporary Asic Rtl Design EngineerTemporary FPGA Design Engineer
Primary FocusDesigning RTL code for ASIC chipsDesigning FPGA logic and configurations
Skills & CertificationsVerilog/VHDL, ASIC design flow, simulation toolsVerilog/VHDL, FPGA development tools, synthesis
Work EnvironmentSemiconductor companies, ASIC design teamsFPGA development labs, prototyping environments
Industry UsageUsed in high-volume chip manufacturingUsed for prototyping, testing, and low-volume products

Both roles involve RTL design using Verilog or VHDL, but the Temporary Asic Rtl Design Engineer focuses on ASIC chip development, while the Temporary FPGA Design Engineer specializes in FPGA-based prototyping and testing. The choice depends on whether the project aims for mass production or flexible, rapid development.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in New York? The most popular types of Asic Rtl Design Engineer jobs in New York are:
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ASIC Engineer

$181.60K/yr

Other

Posted 2 days ago


Job description

About the Position

We are looking to hire an experienced ASIC Engineer to help us design, test and deploy advanced hardware designs. As part of our Ultra Low Latency team, you'll have the opportunity to collaborate with people in areas across the firm, including trading, networking and research infrastructure. We are looking for someone who can contribute to all of our projects and be happy to work on both FPGA-based and ASIC-based technologies.

We're big believers in the ability of tools to improve the productivity, reliability and day-to-day joy of hardware engineering. That's why we created Hardcaml, a hardware development toolchain embedded in OCaml. We don't expect you to know OCaml (we'll teach you here), but we are looking for hardware engineers who are excited about the advantages that better tools can bring, and are willing to try new things as a result.

About You
  • Have 4+ years practical experience in RTL design and verification
  • Experienced in ASIC design using either Synopsys or Cadence flows, including at least one of the following:
    • Front-end RTL design and synthesis
    • Back-end physical design
    • Verification (including formal)
  • Interested in using software engineering techniques to improve the hardware design process, and experience programming in some high-level languages (Python, C++, Java, Haskell, etc.)

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