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Formal Verification Engineer Jobs in Oregon (NOW HIRING)

Description As a CPU Design Verification Engineer owning the verification of a certain area of ... formal Should be a great teammate with excellent communication skills and be able to work ...

CPU Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

Description As a CPU Design Verification Engineer owning the verification of a certain area of ... formal Should be a great teammate with excellent communication skills and be able to work ...

CPU Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

Description As a CPU Design Verification Engineer owning the verification of a certain area of ... formal Should be a great teammate with excellent communication skills and be able to work ...

CPU Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

Description As a CPU Design Verification Engineer owning the verification of a certain area of ... formal Should be a great teammate with excellent communication skills and be able to work ...

Description As a CPU Design Verification Engineer owning the verification of a certain area of ... formal Should be a great teammate with excellent communication skills and be able to work ...

Description As a CPU Design Verification Engineer owning the verification of a certain area of ... formal Should be a great teammate with excellent communication skills and be able to work ...

CPU Design Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

Description As a CPU Design Verification Engineer owning the verification of a certain area of ... formal Should be a great teammate with excellent communication skills and be able to work ...

Description As a CPU Design Verification Engineer owning the verification of a certain area of ... Experience with advanced verification techniques such as formal * Should be a great teammate with ...

... formal verification approaches, to validate complex SoC designs. - Develop and execute block ... Qualifications: Minimum Qualifications - Bachelor's or BS degree in Electrical Engineering ...

Design Verification Engineers at Apple are responsible for verifying the functionality and ... for formal education related to advancing your career at Apple, reimbursement for certain ...

Design Verification Engineers at Apple are responsible for verifying the functionality and ... for formal education related to advancing your career at Apple, reimbursement for certain ...

Design Verification Engineers at Apple are responsible for verifying the functionality and ... for formal education related to advancing your career at Apple, reimbursement for certain ...

Our researchers apply formal analysis techniques to the design and verification of critical ... Research Engineers at Galois design and develop advanced technologies for safety- and security ...

Our researchers apply formal analysis techniques to the design and verification of critical ... Research Engineers at Galois design and develop advanced technologies for safety- and security ...

Our researchers apply formal analysis techniques to the design and verification of critical ... Research Engineers at Galois design and develop advanced technologies for safety- and security ...

Showing results 21-40

Formal Verification Engineer information

See Oregon salary details

$84.6K

$150.8K

$215.2K

How much do formal verification engineer jobs pay per year?

As of Aug 9, 2026, the average yearly pay for formal verification engineer in Oregon is $150,789.00, according to ZipRecruiter salary data. Most workers in this role earn between $143,800.00 and $143,800.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a formal verification engineer?

To thrive as a Formal Verification Engineer, you need a strong background in digital design, computer architecture, and logic, typically supported by a degree in electrical engineering, computer science, or a related field. Expertise in formal verification tools such as Cadence JasperGold, Synopsys VC Formal, or Mentor Questa, along with proficiency in hardware description languages (HDLs) like Verilog or VHDL, is essential. Strong analytical thinking, attention to detail, and effective communication skills help you collaborate with design and verification teams and present complex findings. These competencies are critical for ensuring hardware systems are bug-free, reliable, and meet stringent industry standards.

What are the common daily responsibilities of a formal verification engineer?

As a Formal Verification Engineer, your typical day involves creating and analyzing formal properties, developing assertions, and using formal verification tools to mathematically prove correctness of hardware designs. You'll collaborate closely with design and simulation teams to review specifications, identify verification requirements, and debug issues found during the verification process. Regular documentation of findings, participation in code and design reviews, and ongoing learning about new verification methodologies are also important parts of the role. This dynamic environment requires both technical depth and proactive teamwork to ensure high-quality design outcomes.

What is a formal verification engineer?

A Formal Verification Engineer is responsible for ensuring the correctness of hardware or software designs using mathematical and logical techniques. They apply formal methods to verify that a system behaves as intended, identifying potential design flaws early in the development process. This involves writing formal properties, using model checking tools, and collaborating with design and validation teams. Their work helps improve reliability, reduce bugs, and enhance the efficiency of verification compared to traditional simulation-based methods.

What are the most commonly searched types of Formal Verification Engineer jobs in Oregon? The most popular types of Formal Verification Engineer jobs in Oregon are:
What are popular job titles related to Formal Verification Engineer jobs in Oregon? For Formal Verification Engineer jobs in Oregon, the most frequently searched job titles are:
What job categories do people searching Formal Verification Engineer jobs in Oregon look for? The top searched job categories for Formal Verification Engineer jobs in Oregon are:
What cities in Oregon are hiring for Formal Verification Engineer jobs? Cities in Oregon with the most Formal Verification Engineer job openings:
Infographic showing various Formal Verification Engineer job openings in Oregon as of August 2026, with employment types broken down into 78% Full Time, 18% Part Time, and 4% Contract. Highlights an 87% Physical, 4% Hybrid, and 9% Remote job distribution, with an average salary of $150,789 per year, or $72.5 per hour.

CPU Design Verification Engineer

Apple

Beaverton, OR

$141K - $172K/yr

Full-time

Re-posted 8 days ago


Apple rating

8.0

Company rating: 8.0 out of 10

Based on 677 frontline employees who took The Breakroom Quiz

7th of 30 rated technology retailers


Job description

Imagine what you could do here. At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same passion for innovation that goes into our products also applies to our practices strengthening our commitment to leave the world better than we found it. Do you want join us in these pursuits? Join us to help deliver the next groundbreaking Apple product!
In this highly visible role, you will be at the center of a chip design effort collaborating with all disciplines, with a critical impact on getting functional products to millions of customers quickly.
Description
As a CPU Design Verification Engineer owning the verification of a certain area of functionality in a CPU design, you will have the responsibilities as follows:
• Work closely with architecture and RTL designers on verifying the functional correctness of the design
• Develop test plans and test environments
• Develop tests in assembly, C, or vectors according to test plans
• Develop coverage monitors and analyze coverage to ensure all the test cases in the plans are covered
• Develop checkers and SystemVerilog or C-base transactors to verify the design
Preferred Qualifications
Bachelor of Science or Engineering in Electrical Engineering, Computer Engineering, or Computer Science
Operating system knowledge
Experience in post-silicon bringup
Experience with advanced verification techniques such as formal
Should be a great teammate with excellent communication skills and be able to work independently on the verification efforts for a block/area of the design
Minimum Qualifications
Minimum BS and 10+ years of relevant industry experience
Experience with CPU architecture
Experience with digital logic design, chip architecture, and microarchitecture
Programming experience in C/C++ or SystemVerilog
Experience with developing testplans/testbenches, C-based transactors, and writing/debugging tests

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About Apple

Sourced by ZipRecruiter

Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.

Industry

Computer and electronic product manufacturing

Company size

10,000+ Employees

Headquarters location

Cupertino, CA, US

Year founded

1976