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System Verilog Jobs in Oregon (NOW HIRING)

SoC Design and Verification

Hillsboro, OR

$148K - $180K/yr

Creating System Verilog / OVM test benches at the IP & SOC level and validating. * At least 1-year experience in any of the Scripting: Perl, Tcl, python. * Experience with low power design. * Must ...

Emulation Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

... Verilog/System Verilog/UVM - Develop random stimulus infrastructure by reusing existing UVM simulation constraints Minimum Qualifications Minimum of BS + 3 years relevant industry experience.

Emulation Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

... Verilog/System Verilog/UVM - Develop random stimulus infrastructure by reusing existing UVM simulation constraints Preferred Qualifications Understanding of the tool flow from RTL to Emulation is a ...

... Verilog/System Verilog/UVM - Develop random stimulus infrastructure by reusing existing UVM simulation constraints Preferred Qualifications Understanding of the tool flow from RTL to Emulation is a ...

Emulation Verification Engineer

Beaverton, OR · On-site

$141K - $172K/yr

... Verilog/System Verilog/UVM - Develop random stimulus infrastructure by reusing existing UVM simulation constraints Minimum Qualifications Minimum of BS + 10 years relevant industry experience.

Use Verilog to design and System Verilog for block level verification * Assist the Verification team in reviewing and debugging test cases * Run LINT and CDC checks on the RTL code and fix ...

SoC Design and Verification

Hillsboro, OR

$148K - $180K/yr

Creating System Verilog / OVM test benches at the IP & SOC level and validating * At least 1 year experience in any of the Scripting: Perl, Tcl, python * Experience with low power design * Must have ...

SMTS Verification Engineering

Hillsboro, OR · On-site

$108K - $201K/yr

System Verilog testbench, Verilog/System Verilog logic design/RTL fluency a must * Pre-existing Experience / familiarity with DDR DRAM technology a strong preference * Working experience with Python ...

SMTS Verification Engineering

Hillsboro, OR · Hybrid

$108K - $201K/yr

System Verilog testbench, Verilog/System Verilog logic design/RTL fluency a must * Pre-existing Experience / familiarity with DDR DRAM technology a strong preference * Working experience with Python ...

SMTS Verification Engineering

Hillsboro, OR · Hybrid

$108K - $201K/yr

System Verilog testbench, Verilog/System Verilog logic design/RTL fluency a must * Pre-existing Experience / familiarity with DDR DRAM technology a strong preference * Working experience with Python ...

Lead MTS Logic Design

Hillsboro, OR · Hybrid

$111K - $147K/yr

RTL coding: Verilog / System Verilog * Master's degree or PHD in Electrical Engineering, Computer Engineering or equivalent. * 7+ years of experience with RTL Design * Good English skills ...

OR · Hybrid

This includes coding in System Verilog, UVM, C++, Perl, Python and NVIDIA custom compilers and tools. * Partnering closely with our clocks architecture and design team to validate our clocks design.

Writing System Verilog Assertions (SVA) Preferred Qualifications: Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

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System Verilog information

See Oregon salary details

$56.6K

$134.5K

$176.6K

How much do system verilog jobs pay per year?

As of Aug 1, 2026, the average yearly pay for system verilog in Oregon is $134,502.00, according to ZipRecruiter salary data. Most workers in this role earn between $103,600.00 and $166,000.00 per year, depending on experience, location, and employer.

What is SystemVerilog used for?

SystemVerilog is a hardware description and verification language used by System Verilog engineers to design, model, and verify digital electronic systems, especially integrated circuits and FPGAs. It combines features of Verilog with advanced verification capabilities, making it essential for hardware development and testing. Professionals often use SystemVerilog alongside simulation tools like ModelSim or QuestaSim to ensure design correctness.

What are the typical daily tasks and team interactions for a SystemVerilog Engineer?

SystemVerilog Engineers typically spend their days writing, debugging, and optimizing verification testbenches and scripts to ensure hardware designs function as intended. They often collaborate closely with design engineers, participating in design reviews, and providing feedback on specification documents. Frequent interactions with verification teams help in developing comprehensive test plans and resolving functional issues. The role requires proactive communication and teamwork, as successful verification projects depend on close cooperation between multiple engineering disciplines.

What is the salary of SystemVerilog engineer?

The average salary of a SystemVerilog engineer typically ranges from $80,000 to $130,000 annually, depending on experience, location, and industry. Senior engineers with specialized skills in hardware design and verification can earn higher salaries, especially in high-demand tech and semiconductor sectors.

What are the key skills and qualifications needed to thrive in the System Verilog position, and why are they important?

To thrive as a SystemVerilog Engineer, you should have a solid background in digital design, logic verification, and a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys VCS, Cadence Incisive, and UVM methodology is often required, along with relevant certifications or hands-on project experience. Strong analytical thinking, problem-solving, and effective communication are crucial soft skills for collaborating with design and verification teams. Mastery of these skills ensures robust and efficient verification processes, which are critical for delivering high-quality hardware designs on schedule.

Who uses the SystemVerilog?

SystemVerilog is used primarily by hardware design and verification engineers working on integrated circuits and FPGA development. It is a hardware description and verification language commonly employed in semiconductor and electronic design automation environments to create testbenches and simulate digital systems.

What companies hire systems engineers?

Many technology, aerospace, defense, and semiconductor companies hire systems engineers to design, develop, and integrate complex systems. Major employers include companies like Lockheed Martin, Raytheon, Intel, AMD, and Cisco, which often seek candidates with skills in hardware description languages like SystemVerilog, embedded systems, and verification processes.

What is a System Verilog job?

A SystemVerilog job typically involves designing, verifying, and testing digital hardware using the SystemVerilog language. Engineers in this role work on developing testbenches, writing assertions, and simulating circuits to ensure functional correctness. These jobs are common in semiconductor and ASIC/FPGA design industries, where verification engineers use SystemVerilog with methodologies like UVM. Strong knowledge of RTL design, verification methodologies, and debugging tools is essential.

What job categories do people searching System Verilog jobs in Oregon look for? The top searched job categories for System Verilog jobs in Oregon are:
Infographic showing various System Verilog job openings in Oregon as of July 2026, with employment types broken down into 1% As Needed, 84% Full Time, 12% Part Time, 2% Contract, and 1% Nights. Highlights an 92% Physical, 2% Hybrid, and 6% Remote job distribution, with an average salary of $134,502 per year, or $64.7 per hour.

SoC Design and Verification

Sonsoft Inc

Hillsboro, OR

$148K - $180K/yr

Full-time

Re-posted 25 days ago


Job description

Company Description

SonSoft Inc. is a USA based corporation duly organized under the laws of the Commonwealth of Georgia. SonSoft Inc is growing at a steady pace specializing in the fields of Software Development, Software Consultancy, and Information Technology Enabled Services.

Job Description
  • At least 7 years of experience in RTL Design verification of SoCs (VHDL, Verilog, System Verilog).
  • At least 2 years of experience in PCIe Logical Phy and PIPE interface pre-silicon verification.
  • Creating System Verilog / OVM test benches at the IP & SOC level and validating.
  • At least 1-year experience in any of the Scripting: Perl, Tcl, python.
  • Experience with low power design.
  • Must have Tool expertise in any: DC, NCSim, Verdi, Spyglass-DFT, LP, TXV, CDC (preferred DC, NC-Sim, and Spyglass).
  • Experience in clock gating, synthesis, CDC, and ECO process is a PLUS.
  • Protocol: PCIe (mandatory), Ethernet, Bridges.
  • Knowledge of ASIC design methodologies and flows.
  • Ability to Manage and conduct training for the team.
  • Worked with companies and seen at least a couple of tape-outs
  • Project management capabilities.
  • Ability to work with teams spread across geography with excellent communication skills.
Qualifications
  • Bachelor's degree or foreign equivalent required from an accredited institution. Will also consider three years of progressive experience in the specialty in lieu of every year of education.
  • At least 11 years of experience with Information Technology.
Additional Information

** U.S. Citizens and those who are authorized to work independently in the United States are encouraged to apply. We are unable to sponsor at this time.

Note:-

  1. This is a Full-Time & Permanent job opportunity for you.
  2. Only US Citizen, Green Card Holder, GC-EAD, H4-EAD & L2-EAD can apply.
  3. No OPT-EAD, H1B & TN candidates, please.
  4. Please mention your Visa Status in your email or resume.

** All your information will be kept confidential according to EEO guidelines.


Sonsoft logo

About Sonsoft

Sourced by ZipRecruiter

Sonsoft , Inc. is a USA based corporation duly organized under the laws of the Commonwealth of Georgia. Sonsoft Inc. is growing at a steady pace specializing in the fields of Software Development, Software Consultancy and Information Technology Enabled Services.

Industry

It services

Company size

51 - 200 Employees

Headquarters location

Alpharetta, GA, US

Year founded

2007