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Digital Design Engineer Jobs in California (NOW HIRING)

Baidu USA

CPU Digital Design Engineer

Sunnyvale, CA · On-site

$159K/yr

... Engineering. - At least 3 years of CPU related Architect/RTL/Verification/Implementation design ... chip digital design flow, including RTL integration, simulation, STA, clock tree, or low power ...

Baidu USA

CPU Digital Design Engineer

Sunnyvale, CA · On-site

$159K/yr

M aster Degree in Electrical Engineering, Computer Science or Computer Engineering. * A t least 3 ... F amiliarity with chip digital design flow, including RTL integration, simulation, STA, clock tree ...

Qualcomm

Senior Digital Design Engineer

San Diego, CA · On-site

$123.06 - $173.40/hr

Performs digital component level evaluation, optimization, unit level testing and RF debug of platform hardware and other wireless designs in an engineering environment. Supports Design Engineers ...

Marvell

Digital Design Engineer

Irvine, CA

$146K/yr

  • Life

  • Retirement

Responsible for design, verification, implementation (ASIC) for high-performance, physical layer, high speed wired data communication networks. * Develop ASIC specification, architecture, and micro ...

Marvell Technology, Inc.

Digital Design Engineer

Irvine, CA · On-site

$146K/yr

  • Life

  • Retirement

Responsible for design, verification, implementation (ASIC) for high-performance, physical layer, high speed wired data communication networks. * Develop ASIC specification, architecture, and micro ...

Marvell

Principal Digital Design Engineer

San Diego, CA

$144K/yr

  • Life

  • Retirement

Supervise or mentor other digital design engineers. What We're Looking For Bachelor's degree in Computer Science, Electrical Engineering or related fields and 10-15+ years of related professional ...

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All JobsDigital Design Engineer JobsDigital Design Engineer Jobs in California

Digital Design Engineer information

See California salary details

$79.4K

$137.5K

$180.1K

How much do digital design engineer jobs pay per year?

As of Aug 13, 2026, the average yearly pay for digital design engineer in California is $137,543.00, according to ZipRecruiter salary data. Most workers in this role earn between $134,200.00 and $134,200.00 per year, depending on experience, location, and employer.

How does a digital design engineer typically collaborate with other engineering teams during a project lifecycle?

Digital Design Engineers work closely with cross-functional teams such as verification, hardware, and software engineers throughout a project's lifecycle. They often participate in regular design reviews, share specifications, and integrate feedback to ensure the digital circuits or systems meet overall requirements. Effective communication and documentation are key, as design changes or issues need to be clearly conveyed to avoid downstream complications. This collaborative environment provides valuable exposure to different engineering disciplines and can enhance both technical and interpersonal skills.

What does a digital design engineer do?

A digital design engineer develops and tests digital circuits and systems, such as integrated circuits, FPGA designs, and ASICs. They use hardware description languages like VHDL or Verilog and often work with simulation tools to ensure functionality and performance before manufacturing. Strong knowledge of digital logic, electronics, and design verification is essential in this role.

What is a digital design engineer?

A digital design engineer is responsible for designing new digital hardware products and the circuitry to make them function. Your job duties include creating the digital hardware design, working with marketing to determine the type of digital products needed, and troubleshooting errors in existing products. The qualifications for having a career as a digital design engineer include a bachelor’s degree, although a master’s degree in electrical engineering may make you more appealing to employers. A successful digital design engineer must possess strong technical skills and have experience in circuitry design.

What are the key skills and qualifications needed to thrive as a digital design engineer, and why are they important?

To thrive as a Digital Design Engineer, you need strong proficiency in digital logic design, circuit analysis, and a solid background in electrical or computer engineering, often demonstrated by a relevant degree. Familiarity with hardware description languages like VHDL or Verilog, CAD tools such as Synopsys or Cadence, and experience with FPGA or ASIC development are typically required. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help you excel in collaborative and fast-paced environments. These skills and qualifications are essential for delivering high-performance, reliable digital systems that meet project requirements and industry standards.

How much do digital design engineers make?

Digital design engineers typically earn a median annual salary of around $100,000, with salaries ranging from approximately $70,000 to over $130,000 depending on experience, location, and industry. They often work with hardware description languages like VHDL or Verilog and may require a bachelor's degree in electrical engineering or related fields.
More about Digital Design Engineer jobs
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What cities in California are hiring for Digital Design Engineer jobs? Cities in California with the most Digital Design Engineer job openings:
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Digital Design Engineer jobs near you
Infographic showing various Digital Design Engineer job openings in California as of August 2026, with employment types broken down into 6% Internship, 67% Full Time, 9% Part Time, and 18% Contract. Highlights an 97% In-person, and 3% Hybrid job distribution, with an average salary of $137,543 per year, or $66.1 per hour.

Technical Lead Digital Design Engineer

Astera Labs

San Jose, CA • On-site

$160K - $195K/yr

Full-time

Re-posted 3 days ago

Job description

Role Overview

Join Astera Labs as a Technical Lead Digital Design Engineer to architect and implement next-generation digital designs for high-performance AI connectivity solutions. You'll own complex blocks from micro-architecture through silicon bring-up, driving RTL implementation and collaborating with verification, physical design, and DFT teams to deliver production-quality silicon supporting PCIe Gen 6/7, CXL, UALink, UCI, Ethernet, and DDR4/DDR5 protocols.

This role offers the opportunity to work on cutting-edge technology at the forefront of AI infrastructure, taking ownership of critical design challenges in a fast-paced, collaborative environment where your contributions directly impact products deployed by the world's leading hyperscalers.

Key Responsibilities

  • Design Ownership & Execution
    • Develop and implement complex digital blocks and subsystems by defining micro-architecture and driving RTL implementation with an exceptional power, performance and area trade-off using silicon technologies better than 7nm.
    • Lead efforts to achieve timing closure and implement Design-for-Test (DFT) features for optimal design performance
    • Drive designs to production, ensuring accountability for quality, schedule, and overall design success
  • Verification & Integration
    • Collaborate with verification teams to develop test plans, achieve coverage closure, and debug complex issues
    • Own third-party IP integration and block-level verification through sign-off
    • Work closely with post-silicon teams to facilitate silicon bring-up and debug
  • Technical Leadership
    • Mentor junior engineers to develop their technical skills and expertise
    • Actively contribute to the development and improvement of silicon development processes
    • Drive design methodology improvements and CAD automation initiatives

Basic Qualifications

  • Bachelor's degree in Electrical Engineering or equivalent
  • 5+ years of hands-on experience developing complex SoC/silicon products in Server, Storage, and/or Networking markets
  • Expertise in architecture definition, micro-architecture development, RTL coding, functional simulation, and synthesis
  • Strong understanding of timing closure, gate-level simulation (GLS), and DFT implementation
  • Deep expertise in at least one high-speed protocol: PCIe, CXL, Ethernet, DDR, or similar
  • Production experience with advanced CMOS nodes (7nm)
  • Proficiency with Cadence and/or Synopsys digital design flows

Preferred Qualifications

  • Master's degree in Electrical Engineering or related field
  • Track record of delivering multiple high-performance designs to production in data-center environments
  • Hands-on collaboration with embedded firmware teams; understanding of firmware development challenges
  • Familiarity with standard embedded processor subsystems (RISC-V, Arm, etc.)
  • Proven contributions to design methodology, CAD automation, or design infrastructure

Salary range is $160,000 to $195,000 depending on experience, level, and business need. This role may be eligible for discretionary bonus, incentives and benefits

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