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Design Verification Engineer Startup Jobs (NOW HIRING)

Intel

Design Verification Engineer

Santa Clara, CA · On-site

$141K - $200K/yr

Intel is seeking a Design Verification Engineer for the Silicon Chassis team. In this role, you will contribute to verification of next-generation interconnect and chassis IPs that scale across ...

iFlow Inc

Design Verification Engineer

Santa Clara, CA · On-site

$159K - $195K/yr

Design Verification Engineer Location:Santa Clara CA Duration: Long term Experience:8-15 Years Description : Key Responsibilities: Strong understanding of SV and UVM and good debugging skills.

Baidu USA

Design Verification Engineer

Sunnyvale, CA · On-site

$159K - $194K/yr

Description We are looking for an experienced design verification engineer to join our SoC team at Baidu's Sunnyvale office. The successful candidate will be a motivated self-starter who will thrive ...

Texas Instruments

Design Verification Engineer

Knoxville, TN · On-site

$129K - $158K/yr

As a Design Verification Engineer, you will work across the full verification cycle - from developing detailed verification plans and building test benches through running coverage regressions ...

INA Solution Inc

Design verification engineer

San Diego, CA · Remote

$139K - $169K/yr

Design Verification Engineer Location: Remote anywhere in the USA and Canada Duration: Full-time (REMOTE) VISA: ONLY USC AND GC We are looking for humble geniuses, who believe that engineering has ...

Baidu USA

Design Verification Engineer

Sunnyvale, CA · On-site

$159K - $194K/yr

Description We are looking for an experienced design verification engineer to join our SoC team at Baidu's Sunnyvale office. The successful candidate will be a motivated self-starter who will thrive ...

Redolent, Inc.

Design Verification Engineer

Santa Clara, CA · On-site

$159K - $195K/yr

We are seeking a skilled Design Verification Engineer to join our hardware engineering team. The ideal candidate will be responsible for verifying complex digital designs using advanced verification ...

Mirafra Technology

Design Verification Engineer

San Diego, CA · On-site

$144K - $176K/yr

Design Verification Engineer Job Type : Full time Location : San Diego And Bay Area : Strong verification skills: test planning, problem solving, debug, adversarial testing. Multimedia Camera Image ...

Correct Designs

Design Verification Engineer

Austin, TX · On-site

$134K - $164K/yr

Design Verification Engineer Looking for new challenges? Would you like the variety of a contract position along with long term stability and benefits? Correct Designs can give it all to you. Correct ...

Texas Instruments

Design Verification Engineer

Dallas, TX · On-site

$123K - $151K/yr

As a Design Verification Engineer, you will work across the full verification cycle - from understanding the system/design intent, developing detailed verification plans and building test benches ...

SambaNova

Design Verification Engineer

San Jose, CA · On-site

$159K - $194K/yr

About the role SambaNova Systems is looking for a talented and motivated Design Verification Engineer, DFT to help us build state of the art RDU chips for machine learning and artificial intelligence.

Mythic

Design Verification Engineer

Palo Alto, CA

$120K - $225K/yr

We're hiring experienced Design Verification Engineers from junior to senior levels to play a key role in developing and verifying the designs that will bring our next-generation AI processors to ...

Socket.dev

Design Verification Engineer

Knoxville, TN · On-site

$129K - $158K/yr

As a Design Verification Engineer, you will work across the full verification cycle - from developing detailed verification plans and building test benches through running coverage regressions ...

Texas Instruments

Design Verification Engineer

Dallas, TX · On-site

$123K - $151K/yr

As a Design Verification Engineer, you will work across the full verification cycle - from understanding the system/design intent, developing detailed verification plans and building test benches ...

INA Solution Inc

Design Verification Engineer

San Diego, CA · Remote

$139K - $169K/yr

Design Verification Engineer Location: Remote anywhere in the USA and Canada Duration: Full-time We are looking for humble geniuses, who believe that engineering has the potential to make the ...

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Design Verification Engineer Startup information

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$105.5K

$149.2K

$167K

How much do design verification engineer startup jobs pay per year?

As of Sep 10, 2026, the average yearly pay for design verification engineer startup in the United States is $149,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $166,000.00 per year, depending on experience, location, and employer.

What does a design verification engineer do at a startup?

A Design Verification Engineer at a startup is responsible for ensuring that hardware designs, such as integrated circuits or systems-on-chip, function as intended before they are manufactured. This typically involves developing and running simulations, creating testbenches, writing verification plans, and identifying bugs or mismatches in the design. In a startup environment, Design Verification Engineers often work closely with design, software, and product teams, and may need to wear multiple hats due to limited resources. Their work is crucial in reducing costly errors and speeding up the development cycle, helping the company deliver reliable products to market quickly.

What are the key skills and qualifications needed to thrive as a design verification engineer at a startup?

To thrive as a Design Verification Engineer at a startup, you need a strong background in digital design, verification methodologies, and a relevant degree in electrical engineering or computer science. Familiarity with tools like SystemVerilog, UVM, simulation environments, and version control systems is typically required, along with experience in scripting languages. Strong problem-solving abilities, adaptability, and effective communication are crucial soft skills, especially in fast-paced startup environments. These skills ensure efficient bug detection, robust product development, and successful collaboration within small, agile teams.

What unique challenges might a design verification engineer face when working at a startup compared to a larger company?

At a startup, Design Verification Engineers often work with smaller teams and less established processes, which means you'll likely take on a broader range of responsibilities—from testbench development to hands-on debugging and even influencing verification methodologies. The fast-paced environment can present challenges such as tighter deadlines, limited resources, and rapidly changing project scopes. However, this setting also allows for closer collaboration with design, software, and product teams, fostering a greater sense of ownership and quicker decision-making. Your contributions are highly visible, and there's significant potential for accelerated career growth as the company scales.

What is the difference between Design Verification Engineer Startup vs Design Verification Engineer Large Corporation?

AspectDesign Verification Engineer StartupDesign Verification Engineer Large Corporation
CredentialsBachelor's or Master's in Electrical Engineering, Computer Engineering, or related fields; certifications like Certified Verification Engineer are commonSame as startup; often similar certifications and educational background
Work EnvironmentAgile, fast-paced, collaborative teams with flexible processesStructured, process-driven, with formal verification methodologies and documentation
Employer & Industry UsageStartups in semiconductor, electronics, or tech sectors; emphasis on innovationLarge tech, semiconductor, or electronics companies with established verification teams
Search & Comparison IntentUnderstanding role differences in startup vs large company

Both roles require similar technical skills and educational backgrounds. The main differences lie in work environment and processes, with startups being more flexible and fast-paced, while large corporations follow formal verification procedures. Candidates should consider their preferred work style when comparing these roles.

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For Design Verification Engineer Startup jobs, the most frequently searched job titles are:

Design Verification Engineer Startup jobs near you
Infographic showing various Design Verification Engineer Startup job openings in the United States as of September 2026, with employment types broken down into 1% Internship, 89% Full Time, 7% Part Time, and 3% Contract. Highlights an 81% Physical, 4% Hybrid, and 15% Remote job distribution, with an average salary of $149,150 per year, or $71.7 per hour.

Design Verification Engineer

Santa Clara, CA • On-site

Intel
Manufacturing • 10K+ employees
Learn more about Intelexternal

$141K - $200K/yr

Full-time

Medical, Retirement, PTO

Re-posted 22 days ago

Intel rating

8.7

Company rating: 8.7 out of 10

Based on 147 frontline employees who took The Breakroom Quiz

19th of 162 rated electronics manufacturers

Job description

Job Details:Job Description: 

Intel is seeking a Design Verification Engineer for the Silicon Chassis team. In this role, you will contribute to verification of next-generation interconnect and chassis IPs that scale across multiple product families. You will work closely with senior engineers to build and execute robust verification plans, develop high-quality reusable environments, and help deliver first-pass silicon success through strong design verification practices. This role requires strong programming and algorithmic problem-solving skills, hands-on verification development, and willingness to work across traditional discipline boundaries. AI-assisted workflows are part of everyday development here.

Responsibilities
- Develop and execute verification plans and testbenches for interconnect and chassis IP/features at IP and subsystem level
- Build reusable verification components, checkers, constrained-random tests, and debug infrastructure to improve coverage and productivity
- Work with architecture, design, and software teams on spec reviews, feature clarification, bug triage, and closure; contribute outside strict DV boundaries when needed
- Analyze simulation failures, root-cause issues quickly, and drive fixes to closure with clear technical communication
- Contribute to functional coverage planning, coverage closure, and quality signoff under guidance of technical leads
- Contribute to both simulation and formal verification efforts; continuously improve verification automation, regression quality, and development efficiency

You should also demonstrate: Proven ability to write clean, reusable, and maintainable verification code and automation scripts, and to collaborate effectively across architecture, design, and software teams

Qualifications:

Minimum Qualifications
- BS/MS in Electrical Engineering, Computer Science, or related field, with 3+ years of relevant experience in design verification
- Programming fundamentals and algorithmic problem-solving skills, with demonstrated hands-on coding experience in SystemVerilog, C/C++, and Python
- Foundation in simulation-based verification methodologies UVM/ABV, with exposure to formal verification concepts; testbench development, debugging, and coverage-driven verification
- Hands-on experience using AI-assisted development tools as part of daily workflow for coding, debugging, and test development

Preferred Qualifications
- Exposure to interconnects and bus protocols for example AMBA AXI/ACE/CHI, PCIe, CXL, UCIe
- Understanding of cache coherency and memory consistency models
- Experience with external interfaces and system integration debug
- Experience with formal verification tools (JasperGold, VC Formal, or similar) and emulation or FPGA-based verification
- Exposure to RTL concepts, physical design, or CAD tool flows
- Prior work with system IPs such as MMUs SMMU or IOMMU and interrupt controllers

Job Type:Experienced HireShift:Shift 1 (United States of America)Primary Location: US, California, Santa ClaraAdditional Locations:Business group:The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable engineering solutions across three pillars: Product Enablement (IP, tools, and methodologies), Custom ASIC (leveraging existing IP for custom silicon), and Foundry Enablement (supporting top customers and validating technologies). The team focuses on customer-driven, end-to-end solutions with short development cycles to deliver measurable business impact across Intel's product and foundry businesses.Posting Statement:All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.Position of TrustN/ABenefits

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.

Annual Salary Range for jobs which could be performed in the US: $141,910.00-200,340.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

*

ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.

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About Intel

Sourced by ZipRecruiter

Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Santa Clara, CA, US

Year founded

1968

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