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Ai Chip Design Rtl Jobs in California (NOW HIRING)

Bronco AI

Founding AI Engineer

San Francisco, CA · On-site

... chip development through AI agents that enhance chip verification and design processes. The ... RTL artifacts • Iterate with silicon domain experts and customers to encode verification ...

MatX

SOC Integration Engineer

Mountain View, CA · Remote

$175K - $450K/yr

... chip SOC RTL design. * Partner with SubSystem owners within the Design team to facilitate block ... Leverage hands-on experience with AI-driven tools to architect automation for SOC integration and ...

ChipAgents

Full-Stack AI Engineer

San Jose, CA · On-site

$350K/yr

Our platform leverages cutting-edge generative AI to assist engineers in RTL design, simulation, and verification, dramatically accelerating chip development. Founded by experts in AI and ...

MatX

SOC Integration Engineer

Mountain View, CA · On-site

$175K - $450K/yr

... chip SOC RTL design. * Partner with SubSystem owners within the Design team to facilitate block ... Leverage hands-on experience with AI-driven tools to architect automation for SOC integration and ...

Google

TPU RTL Design Engineer

Sunnyvale, CA · On-site

$159K/yr

... in ASIC RTL design, with a focus on clocking, reset, or timing-critical RTL development ... The AI and Infrastructure team is redefining what's possible. We empower Google customers with ...

ChipAgents

Research Scientist

San Jose, CA · On-site

$350K/yr

Our platform leverages cutting-edge generative AI to assist engineers in RTL design, simulation, and verification, dramatically accelerating chip development. Founded by experts in AI and ...

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Ai Chip Design Rtl information

What is the difference between Ai Chip Design Rtl vs Ai Chip Verification Engineer?

AspectAi Chip Design RtlAi Chip Verification Engineer
Primary FocusDeveloping and implementing Register Transfer Level (RTL) code for AI chipsVerifying and validating RTL designs to ensure functionality
Skills RequiredHDL languages (Verilog/VHDL), digital design, FPGA/ASIC knowledgeSimulation, testbench creation, debugging, scripting skills
Work EnvironmentDesign teams, hardware development labs, EDA toolsVerification teams, simulation environments, test setups
CertificationsHardware design certifications, FPGA/ASIC trainingVerification methodologies, UVM, SystemVerilog certifications

While Ai Chip Design Rtl focuses on creating the hardware description code for AI chips, Ai Chip Verification Engineer ensures that the RTL design functions correctly through rigorous testing. Both roles require knowledge of HDL languages and work closely within hardware development teams, but their core responsibilities differ—design versus verification.

What are common challenges faced by AI Chip Design RTL engineers during the verification process?

AI Chip Design RTL engineers often encounter challenges in ensuring their designs meet complex functional and performance requirements, especially given the rapid pace of AI hardware advancements. Verification can be particularly demanding due to the need to simulate and test intricate AI workloads, manage large datasets, and debug subtle timing or logic errors. Collaboration with verification teams, system architects, and software engineers is essential to address these issues efficiently and to ensure seamless integration of the RTL code into the broader chip design. Staying up-to-date with the latest verification tools and methodologies is also crucial for success in this role.

What is an AI Chip Design RTL engineer?

AI Chip Design RTL (Register Transfer Level) engineers are specialists who design the digital logic for chips used in artificial intelligence applications. They use hardware description languages like Verilog or VHDL to create and validate the architecture and functionality of these chips before they are manufactured. Their work ensures that AI processors are efficient, high-performing, and meet the requirements of modern AI workloads. RTL engineers collaborate closely with verification, software, and hardware teams to optimize chip performance and power consumption.

What skills and qualifications are needed to thrive as an AI Chip Design RTL engineer?

To thrive as an AI Chip Design RTL Engineer, you need a solid background in digital design, computer architecture, and proficiency in Hardware Description Languages (HDLs) like Verilog or VHDL, often supported by a degree in electrical or computer engineering. Experience with simulation tools (e.g., ModelSim, Synopsys), ASIC/FPGA design flows, and relevant certifications are highly valued. Strong problem-solving abilities, attention to detail, and effective teamwork and communication skills help you excel in collaborative and complex design environments. These competencies are crucial for creating efficient, reliable AI hardware that meets performance and power requirements in a fast-evolving field.
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Infographic showing various Ai Chip Design Rtl job openings in California as of August 2026, with employment types broken down into 87% Full Time, 8% Part Time, and 5% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution.

Founding AI Engineer

Bronco AI

San Francisco, CA • On-site

Full-time

Re-posted 2 days ago

Job description

Job Summary:
Bronco AI is focused on advancing chip development through AI agents that enhance chip verification and design processes. The Founding AI Engineer will be responsible for developing the core intelligence for these agents, including designing training pipelines and improving decision-making through reinforcement learning.
Responsibilities:
• Design and implement post-training pipelines for domain-specific model behavior across DV tasks — testbench generation, bug triage, coverage closure
• Develop reinforcement learning setups, including reward modeling and RLHF/RLAIF pipelines, to improve agent decision-making on long-horizon verification tasks
• Build tool interfaces, scaffolding, and execution harnesses that allow models to interact reliably with EDA environments and RTL artifacts
• Iterate with silicon domain experts and customers to encode verification knowledge into training data, reward signals, and evals that measure real agent capability — not proxy metrics
• Stay current with frontier research in LLM reasoning, RL for agents, and tool use — and bring what's relevant into production
Qualifications:
Required:
• You have shipped agentic AI systems that work in the real world
• Experience at an industry research lab, as a past founder, or as a founding engineer at an AI startup
• Deep hands-on experience with post-training: RLHF, DPO, or equivalent
• Experience designing evaluation frameworks for LLM or agentic systems
• Strong proficiency in Python and PyTorch
Preferred:
• Background in Electrical or Computer Engineering
• Familiarity with chip design and verification workflows
• Experience with EDA tools (Synopsys, Cadence, Questa, etc.)
• Publications at NeurIPS, ICLR, ICML, DAC, ICCAD, or DVCon
Company:
Bronco AI is an intelligent integration layer across your legacy IT so you can get things done Founded in 2022, the company is headquartered in San Francisco, USA, with a team of 11-50 employees. The company is currently Early Stage.

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