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Vlsi Design Verification Engineer Jobs (NOW HIRING)

Apple

Wireless Design Verification Engineer

San Francisco, CA · On-site

$160K - $195K/yr

... VLSI/RTL design and integration, Design Verification, Emulation, Test and Validation, and FW/SW engineering. Description In this highly visible role, you will be at the center of a silicon design ...

Etech Hi

ASIC / VLSI Engineers

Milpitas, CA

Design Verification Engineer Compensation up to $225K DOE + strong benefits + long-term project stability. What You Need (All Roles) * 8+ years of pre-silicon ASIC / VLSI experience * Strong ...

Apple

C - Focused Design Verification Engineer

San Diego, CA · On-site

$144K - $176K/yr

... VLSI/RTL design and integration, Emulation, Design Verification, Test and Validation, and FW/SW engineering. Description As a C- Focused Design Verification Engineer, you will be at the center of a ...

Wipro Limited

Design Verification Engineer

Santa Clara, UT · On-site

$45K - $121K/yr

  • Medical

  • Dental

  • PTO

Design Verification Engineer City: Santa Clara State/Province: California Posting Start Date: 8/6 ... VLSI HVL Verification. Experience: 3-5 Years. The expected compensation for this role ranges from ...

Correct Designs

Design Verification Engineer

Austin, TX

$134K - $164K/yr

  • Medical

  • Retirement

Design Verification Engineer ID: 1063 Location: Austin, TX More about this job > Description Design Verification Engineer Looking for new challenges? Would you like the variety of a contract position ...

Correct Designs

Design Verification Engineer

Austin, TX

$134K - $164K/yr

  • Medical

  • Retirement

Design Verification Engineer ID: 1058 Location: Austin, TX More about this job > Description Design Verification Engineer Looking for new challenges? Would you like the variety of a contract position ...

Apple

Wireless Design Verification Engineer

Bodega Bay, CA

$175K - $308K/yr

  • Medical

  • Dental

  • Retirement

... VLSI/RTL design and integration, Design Verification, Emulation, Test and Validation, and FW/SW engineering. Description In this highly visible role, you will be at the center of a silicon design ...

Apple

PHY Design Verification Engineer

Bodega Bay, CA

$175K - $308K/yr

  • Medical

  • Dental

  • Retirement

... VLSI/RTL design and integration, Design Verification, Emulation, Test and Validation, and FW/SW engineering. Description In this highly visible role, you will be at the center of a silicon design ...

Apple

Wireless Design Verification Engineer

Bodega Bay, CA

$175K - $308K/yr

  • Medical

  • Dental

  • Retirement

... VLSI/RTL design and integration, Design Verification, Emulation, Test and Validation, and FW/SW engineering. Description In this highly visible role, you will be at the center of a silicon design ...

Apple

PHY Design Verification Engineer

Bodega Bay, CA

$175K - $308K/yr

  • Medical

  • Dental

  • Retirement

... VLSI/RTL design and integration, Design Verification, Emulation, Test and Validation, and FW/SW engineering. Description In this highly visible role, you will be at the center of a silicon design ...

Apple Inc.

PHY Design Verification Engineer

Waltham, MA · On-site

$184.70 - $324.80/hr

  • Medical

  • Dental

  • Retirement

... VLSI/RTL design and integration, Design Verification, Emulation, Test and Validation, and FW/SW engineering. Description In this highly visible role, you will be at the center of a silicon design ...

Apple

PHY Design Verification Engineer

Bodega Bay, CA

$175K - $308K/yr

  • Medical

  • Dental

  • Retirement

... VLSI/RTL design and integration, Design Verification, Emulation, Test and Validation, and FW/SW engineering. Description In this highly visible role, you will be at the center of a silicon design ...

Apple

Wireless Design Verification Engineer

Bodega Bay, CA

$175K - $308K/yr

  • Medical

  • Dental

  • Retirement

... VLSI/RTL design and integration, Design Verification, Emulation, Test and Validation, and FW/SW engineering. Description In this highly visible role, you will be at the center of a silicon design ...

Apple

Wireless Design Verification Engineer

Bodega Bay, CA

$122K - $214K/yr

  • Medical

  • Dental

  • Retirement

... VLSI/RTL design and integration, Design Verification, Emulation, Test and Validation, and FW/SW engineering. Description In this highly visible role, you will be at the center of a silicon design ...

Sivaltech

Design Verification Engineer

San Diego, CA · On-site

$144K - $176K/yr

Design Verification Engineer Location: Bay Area, CA (Onsite/Hybrid) Experience: 8+ Years Job Summary We are seeking an experienced Design Verification Engineer with strong expertise in ASIC/SoC ...

Apple

Wireless Design Verification Engineer

Bodega Bay, CA

$122K - $214K/yr

  • Medical

  • Dental

  • Retirement

... VLSI/RTL design and integration, Design Verification, Emulation, Test and Validation, and FW/SW engineering. Description In this highly visible role, you will be at the center of a silicon design ...

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Showing results 21-40

All JobsVlsi Design Verification Engineer Jobs

Vlsi Design Verification Engineer information

See salary details

$105.5K

$149.2K

$167K

How much do vlsi design verification engineer jobs pay per year?

As of Aug 16, 2026, the average yearly pay for vlsi design verification engineer in the United States is $149,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $166,000.00 per year, depending on experience, location, and employer.

What are some common challenges faced by VLSI design verification engineers during the verification process?

VLSI Design Verification Engineers often encounter challenges such as managing increasingly complex system-on-chip (SoC) designs, ensuring thorough test coverage, and debugging intricate functional issues. Coordinating with cross-functional teams—like design, software, and validation—is essential to align test plans and resolve ambiguities quickly. Additionally, keeping up with evolving verification methodologies and tools (such as UVM or SystemVerilog) requires a commitment to continuous learning, but offers strong career growth opportunities for those who master them.

What are the key skills and qualifications needed to thrive as a VLSI design verification engineer?

To thrive as a VLSI Design Verification Engineer, you need a solid background in digital logic design, computer architecture, and verification methodologies, typically supported by a degree in electrical engineering or a related field. Proficiency with hardware description languages like Verilog or VHDL, simulation tools such as ModelSim or Synopsys VCS, and familiarity with UVM or SystemVerilog are commonly required. Strong analytical thinking, attention to detail, and effective communication are crucial soft skills for identifying design flaws and collaborating with cross-functional teams. These skills and qualifications ensure accurate, reliable chip designs and efficient project execution in the competitive semiconductor industry.

What is the difference between Vlsi Design Verification Engineer vs Vlsi Design Engineer?

AspectVlsi Design Verification EngineerVlsi Design Engineer
Primary FocusVerifying the correctness of VLSI designs through testing and simulationCreating and implementing VLSI chip designs and architectures
Skills & CertificationsHardware description languages (HDL), verification tools, scripting, knowledge of verification methodologiesHDL, digital design, synthesis, timing analysis, and physical design skills
Work EnvironmentDesign teams, verification labs, simulation environmentsDesign teams, synthesis and implementation tools, physical design environments

While both roles require HDL knowledge and work within VLSI teams, the Vlsi Design Verification Engineer primarily focuses on testing and validating designs, whereas the Vlsi Design Engineer is responsible for creating and implementing the actual chip designs.

What is a VLSI design verification engineer?

A VLSI Design Verification Engineer is a specialist responsible for ensuring that integrated circuits (ICs) and systems-on-chip (SoCs) meet their design specifications before manufacturing. They use various verification methodologies, such as simulation, formal verification, and hardware emulation, to identify and fix functional errors in digital designs. Their role is critical in the semiconductor industry to ensure product quality, reduce costly re-spins, and speed up time-to-market. They often work closely with design engineers, using tools like SystemVerilog, UVM, and other verification frameworks.
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Vlsi Design Verification Engineer jobs near you
Infographic showing various Vlsi Design Verification Engineer job openings in the United States as of August 2026, with employment types broken down into 50% Full Time, and 50% Contract. Highlights an 75% In-person, and 25% Remote job distribution, with an average salary of $149,150 per year, or $71.7 per hour.

Wireless Design Verification Engineer

Apple

San Francisco, CA • On-site

$160K - $195K/yr

Full-time

Re-posted 27 days ago

Apple rating

8.0

Company rating: 8.0 out of 10

Based on 677 frontline employees who took The Breakroom Quiz

7th of 30 rated technology retailers

Job description

Would you like to join Apple's growing wireless silicon development team? Our wireless SoC organization is responsible for all aspects of wireless silicon development with a particular emphasis on highly energy-efficient design and new technologies that transform the user experience at the product level, all of which is driven by a world-class vertically integrated engineering team spanning RF/Analog architecture and design, Systems/PHY/MAC architecture and design, VLSI/RTL design and integration, Design Verification, Emulation, Test and Validation, and FW/SW engineering.
Description
In this highly visible role, you will be at the center of a silicon design group with a critical impact on delivering world-class silicon to empower wireless products for hundreds of millions of customers. As a Wireless Design Verification Engineer, you will be responsible for pre-silicon RTL verification of wireless MAC and its interfaces with the rest of the wireless SoC. You will interact with DV methodologists, designers, and communication systems engineers to develop reusable test bench and verification environment deploying the latest methodology with metric-driven verification, ensuring the highest design quality.
Minimum Qualifications
BS and a minimum of 10 years relevant industry experience.
Preferred Qualifications
7+ years of verification experience of wireless/wired communication block/subsystem.
Advanced knowledge of Verilog, SystemVerilog, UVM, and SystemVerilog Assertion.
Knowledge and experience of ASIC verification flows including test bench development, constrained random testing, and code/functional coverage.
Verification experience of one or more of the following: MAC, PHY, DMA, timer, AMBA bus and fabric, encryption/decryption engine.
Verification experience of wireless/wired communication block/subsystem.
Knowledge of wireless protocols such as Bluetooth, UWB, WLAN, or Zigbee.
Proficient in shell and Python scripting, Perl scripting.
Experience of using AI technologies in data mining/analysis.
Experience of Palladium/FPGA validation.
Should be a team player with excellent communication skills, self-motivated and well organized.

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About Apple

Sourced by ZipRecruiter

Imagine what you could do here! At Apple, new ideas have a way of becoming extraordinary products, services, and customer experiences very quickly. Bring passion and dedication to your job and there's no telling what you could accomplish. Dynamic, intelligent people and inspiring, innovative technologies are the norm here. The people who work here have reinvented entire industries with all Apple Hardware products. The same real passion for innovation that goes into our products also applies to our practices strengthening our dedication to leave the world better than we found it.

Industry

Computer and electronic product manufacturing

Company size

10,000+ Employees

Headquarters location

Cupertino, CA, US

Year founded

1976

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