ZipRecruiter

Log In

1

Vlsi Design Verification Engineer Jobs in Missouri

Jobtailor

Senior ASIC Design Engineer

California, MO · On-site

$168 - $310.50/hr

Craft micro‑architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean ... Exposure to Digital systems and VLSI design, Computer Architecture, and Computer Arithmetic is ...

Jobtailor

Senior Memory System Architect

California, MO · On-site

$120 - $180/hr

Exposure/coursework related to Digital systems and VLSI design, Computer Architecture, C/C++ programming languages. * Software development experience with C++, python and/or perl. * Verilog or SV/UVM ...

Jobtailor

SoC Verification Engineer

California, MO · On-site

$120 - $180/hr

Execute verification plans, including emulation and system simulation models, to ensure design ... Collaborate with architects, RTL developers, postsilicon teams, and physical design teams to ...

next page

Showing results 1-20

All JobsVlsi Design Verification Engineer JobsVlsi Design Verification Engineer Jobs in Missouri

Vlsi Design Verification Engineer information

See Missouri salary details

$99K

$139.9K

$156.6K

How much do vlsi design verification engineer jobs pay per year?

As of Aug 31, 2026, the average yearly pay for vlsi design verification engineer in Missouri is $139,903.00, according to ZipRecruiter salary data. Most workers in this role earn between $127,600.00 and $155,700.00 per year, depending on experience, location, and employer.

What is a VLSI design verification engineer?

A VLSI Design Verification Engineer is a specialist responsible for ensuring that integrated circuits (ICs) and systems-on-chip (SoCs) meet their design specifications before manufacturing. They use various verification methodologies, such as simulation, formal verification, and hardware emulation, to identify and fix functional errors in digital designs. Their role is critical in the semiconductor industry to ensure product quality, reduce costly re-spins, and speed up time-to-market. They often work closely with design engineers, using tools like SystemVerilog, UVM, and other verification frameworks.

What are the key skills and qualifications needed to thrive as a VLSI design verification engineer?

To thrive as a VLSI Design Verification Engineer, you need a solid background in digital logic design, computer architecture, and verification methodologies, typically supported by a degree in electrical engineering or a related field. Proficiency with hardware description languages like Verilog or VHDL, simulation tools such as ModelSim or Synopsys VCS, and familiarity with UVM or SystemVerilog are commonly required. Strong analytical thinking, attention to detail, and effective communication are crucial soft skills for identifying design flaws and collaborating with cross-functional teams. These skills and qualifications ensure accurate, reliable chip designs and efficient project execution in the competitive semiconductor industry.

What are some common challenges faced by VLSI design verification engineers during the verification process?

VLSI Design Verification Engineers often encounter challenges such as managing increasingly complex system-on-chip (SoC) designs, ensuring thorough test coverage, and debugging intricate functional issues. Coordinating with cross-functional teams—like design, software, and validation—is essential to align test plans and resolve ambiguities quickly. Additionally, keeping up with evolving verification methodologies and tools (such as UVM or SystemVerilog) requires a commitment to continuous learning, but offers strong career growth opportunities for those who master them.

What is the difference between Vlsi Design Verification Engineer vs Vlsi Design Engineer?

AspectVlsi Design Verification EngineerVlsi Design Engineer
Primary FocusVerifying the correctness of VLSI designs through testing and simulationCreating and implementing VLSI chip designs and architectures
Skills & CertificationsHardware description languages (HDL), verification tools, scripting, knowledge of verification methodologiesHDL, digital design, synthesis, timing analysis, and physical design skills
Work EnvironmentDesign teams, verification labs, simulation environmentsDesign teams, synthesis and implementation tools, physical design environments

While both roles require HDL knowledge and work within VLSI teams, the Vlsi Design Verification Engineer primarily focuses on testing and validating designs, whereas the Vlsi Design Engineer is responsible for creating and implementing the actual chip designs.

Are Vlsi Design Verification Engineers in demand?

Vlsi Design Verification Engineers are in high demand due to the growth of semiconductor and electronics industries, requiring expertise in hardware description languages like Verilog and SystemVerilog. The role often involves working with simulation tools and verification methodologies such as UVM, and demand is strong in regions with advanced chip manufacturing and design centers.

What are popular job titles related to Vlsi Design Verification Engineer jobs in Missouri?

For Vlsi Design Verification Engineer jobs in Missouri, the most frequently searched job titles are:

What job categories do people searching Vlsi Design Verification Engineer jobs in Missouri look for?

The top searched job categories for Vlsi Design Verification Engineer jobs in Missouri are:

What cities in Missouri are hiring for Vlsi Design Verification Engineer jobs?

Cities in Missouri with the most Vlsi Design Verification Engineer job openings:

Vlsi Design Verification Engineer jobs near you
Infographic showing various Vlsi Design Verification Engineer job openings in Missouri as of August 2026, with employment types broken down into 86% Full Time, 12% Part Time, and 2% Contract. Highlights an 85% Physical, 4% Hybrid, and 11% Remote job distribution, with an average salary of $139,903 per year, or $67.3 per hour.

Advanced Physical Design and Verification Engineer (7036)

California, MO • On-site

TSMC - Taiwan Semiconductor Manufacturing Company Limited
See more jobs at TSMC - Taiwan Semiconductor Manufacturing Company Limitedexternal

$86 - $134/hr

Other

This job post has expired today. Applications are no longer accepted.

Job description

Overview of Role

As a Advanced Physical Design and Verification Engineer, you will be responsible for the Design Rule Check, Layout vs. Schematic checking and fix all PDV/EMIR/Noise/SigEM violations and errors. You may also do customization and implementation of top clocks and implement timing ECOs on high performance blocks. You will be reporting to Manager of Advanced Chip implementation team at its San Jose Design Center, California and joining a team of engineers dedicated to pushing the envelope for the world’s leading semiconductor company. We are currently operating in a hybrid work schedule with 4 days in office.

Responsibilities
  • DRC/LVS/ERC/ANTENNA analysis and clean up
  • Floorplan analysis and congestion solution
  • PowerIR/EM analysis and fix
  • Signal EM/Noise analysis and fix
  • Physical verification sign off
  • Implement ECOs for timing closure
  • CustomizedClock tree structure
  • May also perform floorplan, place and route
Minimum Qualifications
  • Master’s degree in Electrical Engineering or Computer Science (Fresh graduate student with limited or no industry experience is welcome to apply).
  • In depth knowledge of hardware design courses including VLSI design, digital integrated circuits, logic design, design for testing, computer architecture, and digital design automation.
  • Experiences in research projects or internship related to RTL coding, digital design and testing, physical implementation or design verification.
  • In depth knowledge of major EDA tools/design flows
  • Experience in Python, Perl/TCL language programming
  • Ability towork regularly ata Customer site in the South Bay area
Preferred Qualifications
  • TSMC N16 and below technology
  • Chip level integration, and wire editing
  • Low-power implementation methodology
  • Able to independently complete Netlist-GDS P&R, signoff task
  • Experience in block level implementation or chip integration and signoff
Company Description

As a trusted technology and capacity provider, TSMC is driven by the desire to be:

  • The world’s leading dedicated semiconductor foundry
  • The technology leader with a strong reputation for manufacturing excellence
  • Advancing semiconductor manufacturing innovations to enable the future of technology

TSMC pioneered the pure-play foundry business model when it was founded in 1987 and has been the world’s leading dedicated semiconductor foundry ever since. The Company supports a thriving ecosystem of global customers and partners with the industry’s leading process technologies and a portfolio of design enablement solutions to unleash innovation for the global semiconductor industry. With global operations spanning Asia, Europe, and North America, TSMC serves as a committed corporate citizen around the world. In North America, TSMC has a strong sales and service organization that works with customers by helping them achieve silicon success with cutting-edge technologies and manufacturing excellence. The Company has continued to accelerate its R&D investment and staffing in recent years and is expanding its manufacturing footprint to support customer innovation with 3D IC technologies and optimal manufacturing capacity.

Diversity statement

TSMC Technology, Inc. is committed to employing a diverse workforce and provides Equal Employment Opportunity for all individuals regardless of race, color, religion, gender, age, national origin, marital status, sexual orientation, gender identity, status as a protected veteran, genetic information, or any other characteristic protected by applicable law.

TSMC is an equal opportunity employer prizing diversity and inclusion. We are committed to treating all employees and applicants for employment with respect and dignity. If you require reasonable accommodation due to a disability during the application or the recruiting process, please feel free to notify us at G_Accommodations@tsmc.com. TSMC confirms to all applicants its commitment to meet TSMC’s obligations under applicable employment law. Reasonable accommodations will be determined on a case-by-case basis.

For positions requiring access to technical data subject to export control regulations, including Export Administration Regulations, TSMC Technology, Inc. may have to obtain export licensing approval from the U.S. Government for certain individuals. All employment is contingent upon TSMC Technology, Inc. obtaining any export license or other approval that may be required by the U.S. Government.

Pay Transparency Statement

At TSMC, your base pay is only part of your overall total compensation package. At the time of this posting, this role typically pays a base salary between $85,500 and $134,000/yr. The range displayed reflect the minimum and maximum target for new hires. Actual pay may be more or less than the posted range. Factors that influence pay include the individual's skills, qualifications, education, experience and the position level and location.

TSMC’s total compensation package consists of market competitive pay, allowances, bonuses and comprehensive benefits. We also offer extensive development opportunities and programs.

#J-18808-Ljbffr

Apply