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Contractual Asic Rtl Design Engineer Jobs in Missouri

Senior ASIC Design Engineer

California, MO · On-site

$168 - $310.50/hr

We are now looking for a Senior ASIC Design Engineer. NVIDIA is seeking Senior ASIC Design ... Craft micro‑architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean ...

... engineering team to meet the power, performance, and area goals for products. * Design, document ... Lead the RTL implementation from the architecture specifications and required RTL quality checks ...

Perform physical design implementation of custom IP and SoC designs from RTL to GDS. * Execute ... Requirements * Bachelor's or BS degree in Electrical Engineering, Computer Engineering, or a ...

Closely working with design team to review specifications and architecture, define verification ... Run RTL and gate level functional verification, debug failures, and analyze coverage * Support ...

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Contractual Asic Rtl Design Engineer information

What is the difference between Contractual Asic Rtl Design Engineer vs Digital IC Design Engineer?

AspectContractual Asic Rtl Design EngineerDigital IC Design Engineer
CredentialsBachelor's/Master's in Electrical Engineering or Computer EngineeringBachelor's/Master's in Electrical Engineering or Computer Engineering
Work EnvironmentContract-based, project-specific, often in semiconductor or tech companiesFull-time or contract, working on digital integrated circuit design
Industry UsageCommon in semiconductor, electronics, and tech firms for ASIC developmentUsed across semiconductor, consumer electronics, and communication industries

Both roles require similar educational backgrounds and work in related environments, focusing on digital circuit design. The main difference is that Contractual Asic Rtl Design Engineers typically work on specific ASIC projects on a contractual basis, while Digital IC Design Engineers may have broader responsibilities in digital chip development, often in full-time roles.

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Senior ASIC Design Engineer

Jobtailor

California, MO • On-site

$168 - $310.50/hr

Other

Posted 21 days ago


Job description

NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. Its legacy of innovation is fueled by great technology—and amazing people. Today, we’re tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self‑driving cars that can understand the world. Doing what’s never been done before takes vision, innovation, and the world’s best talent. As an NVIDIAN, you’ll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.

We are now looking for a Senior ASIC Design Engineer. NVIDIA is seeking Senior ASIC Design Engineers to implement the world’s leading SoC’s, GPU’s and ASIC’s. This position offers the opportunity to have real impact in a multifaceted, technology‑focused company impacting product lines ranging from consumer graphics to self‑driving cars and the growing field of artificial intelligence. We have crafted a team of outstanding people stretching around the globe, whose mission is to push the frontiers of what is possible today and define the platform for the future of computing!

What you’ll be doing:
  • As a key member of our Design team, you will implement, document and deliver high performance, area and power efficient RTL to achieve design targets and specifications.
  • Analyze architectural trade‑offs based on features, performance requirements and system limitations.
  • Craft micro‑architecture, implement in RTL, and deliver a fully verified, synthesis/timing clean design.
  • Collaborate and coordinate with architects, other designers, pre‑ and post‑silicon verification teams, synthesis, timing and back‑end teams to accomplish your tasks.
  • Work on critical designs which are integral to our LLM performance such as real‑time numeric processing, data flow processing, interrupt controllers, and DMA engines.
  • Architect features to help silicon debug and support post‑silicon validation activities.
What we need to see:
  • Bachelors Degree or equivalent experience in Electrical Engineering, Computer Engineering or Computer Science.
  • 8+ years of relevant work experience.
  • Experience in micro‑architecture and RTL development (Verilog), focused on arbiters, scheduling, synchronization & bus protocols and interconnect networks.
  • Great understanding of ASIC design flow including RTL design, verification, logic synthesis, low‑power design and timing analysis.
  • Exposure to Digital systems and VLSI design, Computer Architecture, and Computer Arithmetic is required.
  • Specific knowledge in numerics, confidential compute, dataflow architectures and CPU subsystems is a bonus.
  • Strong interpersonal skills and team attitude.

Widely considered to be one of the technology world’s most desirable employers, NVIDIA offers highly competitive salaries and a comprehensive benefits package. As you plan your future, see what we can offer to you and your family www.nvidiabenefits.com/

Base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 168,000 USD - 264,500 USD for Level 4, and 196,000 USD - 310,500 USD for Level 5.

You will also be eligible for equity and benefits.

NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.

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