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Cpu Rtl Design Engineer Jobs in Missouri (NOW HIRING)

EndoSec LLC

FPGA Engineer

Kansas City, MO

$122K - $157K/yr

Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded software, System ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...

EndoSec LLC

FPGA Engineer

Kansas City, MO · On-site

$126K - $163K/yr

Description Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...

DDN

Senior Staff Engineer - AI Data Path

California, MO · On-site

$180 - $250/hr

Lead the design and implementation of high-performance data movement pipelines using NVIDIA NIXL ... CPU, and storage tiers. * Architect and drive integration of DDN Infinia with GPU-accelerated ...

MasterCard

Senior Software Engineer

O Fallon, MO

$114K - $151K/yr

Do you understand throughput, latency, memory and CPU utilization? Do you have experience and ... make the improvement Design, configure, automate, and execute performance tests Improve the ...

Mastercard, Inc.

Senior Software Engineer

O Fallon, MO · On-site

$114K - $151K/yr

... CPU utilization? • Do you have experience and prefer working in an Agile environment? Role • ... • Design, configure, automate, and execute performance tests • Improve the performance ...

Intellectix

Senior Storage Engineer

Arnold, MO

Design, architect, configure, deploy, upgrade, and support various storage and backup platforms and ... Strong understanding of fundamental hardware concepts: disk, memory, CPU, NIC, HBA, firmware, RAID ...

Intellectix

Senior Storage Engineer

Arnold, MO · On-site

Design, architect, configure, deploy, upgrade, and support various storage and backup platforms and ... Strong understanding of fundamental hardware concepts: disk, memory, CPU, NIC, HBA, firmware, RAID ...

Jobgether

$44 - $58.50/hr

The position offers the opportunity to design and improve foundational infrastructure used by ... Investigate and resolve production issues involving CPU, memory, NUMA, cgroups, scheduling, and ...

New

1 point system

C/C++ Software Engineer

O Fallon, MO · On-site

Do you understand throughput, latency, memory and CPU utilization? * Do you have experience and ... Design, configure, automate, and execute performance tests * Improve the performance environment ...

Accenture

AI & HPC Infrastructure Engineer

Saint Louis, MO · On-site

$97K - $127K/yr

Design and implement AI infrastructure and accelerated computing solutions, aligning system ... Deploy, configure, and manage XPU-based clusters (GPU, DPU, LPU, CPU) across bare-metal and ...

All JobsCpu Rtl Design Engineer JobsCpu Rtl Design Engineer Jobs in Missouri

Cpu Rtl Design Engineer information

See Missouri salary details

$38K

$82.7K

$148.7K

How much do cpu rtl design engineer jobs pay per year?

As of Jul 30, 2026, the average yearly pay for cpu rtl design engineer in Missouri is $82,685.00, according to ZipRecruiter salary data. Most workers in this role earn between $63,800.00 and $92,400.00 per year, depending on experience, location, and employer.

What is the difference between Cpu Rtl Design Engineer vs Cpu Verification Engineer?

AspectCpu Rtl Design EngineerCpu Verification Engineer
Primary FocusDesigning and developing RTL code for CPU componentsVerifying and testing RTL designs for correctness
Skills & CertificationsHDL languages (Verilog/VHDL), FPGA/ASIC design experienceHDL, testbench development, simulation tools
Work EnvironmentDesign teams, hardware development labsVerification teams, simulation environments
Industry UsageSemiconductor companies, CPU design firmsASIC/FPGA verification, chip validation

While both roles require HDL knowledge and work within hardware design environments, Cpu Rtl Design Engineers focus on creating the RTL code for CPU components, whereas Cpu Verification Engineers concentrate on testing and validating those designs to ensure functionality and performance.

What are some common challenges faced by CPU RTL Design Engineers when collaborating with verification and architecture teams?

CPU RTL Design Engineers often work closely with both verification and architecture teams to ensure that the design meets functional and performance requirements. A common challenge is ensuring clear communication of design intent and handling feedback from verification regarding corner cases or bugs. Balancing architectural changes with design timelines and maintaining synchronization across multiple teams can be demanding. Successful engineers proactively document their work, participate in regular sync-ups, and are open to iterative improvements based on collaborative feedback.

What are the key skills and qualifications needed to thrive as a CPU RTL Design Engineer, and why are they important?

To thrive as a CPU RTL Design Engineer, you need a strong background in digital logic design, computer architecture, and proficiency in hardware description languages like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys or Cadence, and experience with simulation, synthesis, and verification methodologies are essential. Strong problem-solving skills, attention to detail, and effective teamwork are crucial soft skills for success in this role. These competencies enable the accurate implementation, debugging, and optimization of complex CPU designs, ensuring performance and reliability in final hardware products.

What are CPU RTL Design Engineers?

CPU RTL (Register Transfer Level) Design Engineers are specialized hardware engineers who design, implement, and verify the digital logic that forms the core of computer processors. They use hardware description languages like Verilog or VHDL to create and simulate the functional blocks of CPUs, ensuring correct operation and optimal performance. Their work involves close collaboration with architecture, verification, and physical design teams to bring processor designs from conception to silicon. They also debug and optimize designs to meet power, speed, and area goals.
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Cpu Rtl Design Engineer jobs near you

FPGA Engineer

EndoSec LLC

Kansas City, MO

$122K - $157K/yr

Full-time

Re-posted 22 days ago

Job description

Apply Now

RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded software, System Integration, Hardware Security, Xilinx, Simulation, IP core, Versal, Stratix, concept to deployment, Vivado, GHDL, Questa, Quartus Prime, Zynq, Agilex, AXI, ACE, Avalon, FPGA verification tools, reverse engineering, cocotb, pyuvm

Full Time

Travel required to 10%.

Must be able to apply for and maintain a U.S. Government Security Clearance

FPGA Engineer

The EndoSec FPGA Engineer is responsible for the design, development, testing, and maintenance of IP cores and FPGA-based systems used in hardware security applications.

Key Responsibilities

FPGA Design and Development: Design and develop IP cores and FPGA configurations implementing the latest in leakage-resilient hardware cryptography algorithms using state-of-the-art FPGA hardware.

Modeling and Simulation: Use simulation tools and verification frameworks to ensure mathematically-correct logic before hardware deployment.

Hardware/Software Design: Work closely with other engineers to integrate FPGA designs with application software and embedded systems. Implement embedded software-based testing solutions where applicable to validate FPGA designs.

Performance Optimization: Optimize FPGA designs for timing, resource utilization, and throughput. Identify and resolve system bottlenecks.

Testing and Validation: Create comprehensive test and verification plans for FPGA components, conduct unit and integration testing, and validate hardware performance against requirements in a remote environment.

System Integration: Ensure seamless integration between internally-developed and third-party IP cores, FPGA designs, and embedded systems. Collaborate with other engineers to develop and maintain system-level architecture.

Troubleshooting and Debugging: Utilize debugging tools and techniques to diagnose and resolve issues within FPGA designs and hardware platforms.

Documentation: Prepare detailed documentation, including design specifications, testing protocols, and user guides, to support system development and maintenance.

Continuous Learning: Actively stay up-to-date with the latest advancements in FPGA technology and hardware security to continually refine and enhance system capabilities.

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About EndoSec

Sourced by ZipRecruiter

Industry

Guided missile and space vehicle manufacturing

Company size

11 - 50 Employees

Headquarters location

Washington, DC, US

Year founded

2013

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