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Cpu Rtl Design Engineer Jobs in Missouri (NOW HIRING)

AI & HPC Infrastructure Engineer

Saint Louis, MO · On-site

$97K - $127K/yr

Design and implement AI infrastructure and accelerated computing solutions, aligning system ... Deploy, configure, and manage XPU-based clusters (GPU, DPU, LPU, CPU) across bare-metal and ...

Based upon design criteria, assemble/manufacture upgrade kit, i.e. control system, SMC banks, etc ... Knowledge of industry piping and engineering norms * Understanding of control systems, CPU, I/O ...

Tooling Mechanic

Berkeley, MO · On-site

$30 - $53.27/hr

... engineering design teams * Utilize manual equipment to fabricate or modify various tooling ... Experience using manual inspection and CPU driven equipment such Laser Trackers Conflict of ...

Showing results 41-47

Cpu Rtl Design Engineer information

See Missouri salary details

$38K

$82.7K

$148.7K

How much do cpu rtl design engineer jobs pay per year?

As of Sep 13, 2026, the average yearly pay for cpu rtl design engineer in Missouri is $82,685.00, according to ZipRecruiter salary data. Most workers in this role earn between $63,800.00 and $92,400.00 per year, depending on experience, location, and employer.

What is a CPU RTL design engineer?

CPU RTL (Register Transfer Level) Design Engineers are specialized hardware engineers who design, implement, and verify the digital logic that forms the core of computer processors. They use hardware description languages like Verilog or VHDL to create and simulate the functional blocks of CPUs, ensuring correct operation and optimal performance. Their work involves close collaboration with architecture, verification, and physical design teams to bring processor designs from conception to silicon. They also debug and optimize designs to meet power, speed, and area goals.

What are the key skills and qualifications needed to thrive as a CPU RTL design engineer?

To thrive as a CPU RTL Design Engineer, you need a strong background in digital logic design, computer architecture, and proficiency in hardware description languages like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys or Cadence, and experience with simulation, synthesis, and verification methodologies are essential. Strong problem-solving skills, attention to detail, and effective teamwork are crucial soft skills for success in this role. These competencies enable the accurate implementation, debugging, and optimization of complex CPU designs, ensuring performance and reliability in final hardware products.

What are some common challenges faced by CPU RTL design engineers when collaborating with verification and architecture teams?

CPU RTL Design Engineers often work closely with both verification and architecture teams to ensure that the design meets functional and performance requirements. A common challenge is ensuring clear communication of design intent and handling feedback from verification regarding corner cases or bugs. Balancing architectural changes with design timelines and maintaining synchronization across multiple teams can be demanding. Successful engineers proactively document their work, participate in regular sync-ups, and are open to iterative improvements based on collaborative feedback.

What is the difference between Cpu Rtl Design Engineer vs Cpu Verification Engineer?

AspectCpu Rtl Design EngineerCpu Verification Engineer
Primary FocusDesigning and developing RTL code for CPU componentsVerifying and testing RTL designs for correctness
Skills & CertificationsHDL languages (Verilog/VHDL), FPGA/ASIC design experienceHDL, testbench development, simulation tools
Work EnvironmentDesign teams, hardware development labsVerification teams, simulation environments
Industry UsageSemiconductor companies, CPU design firmsASIC/FPGA verification, chip validation

While both roles require HDL knowledge and work within hardware design environments, Cpu Rtl Design Engineers focus on creating the RTL code for CPU components, whereas Cpu Verification Engineers concentrate on testing and validating those designs to ensure functionality and performance.

What are popular job titles related to Cpu Rtl Design Engineer jobs in Missouri?

For Cpu Rtl Design Engineer jobs in Missouri, the most frequently searched job titles are:

What job categories do people searching Cpu Rtl Design Engineer jobs in Missouri look for?

The top searched job categories for Cpu Rtl Design Engineer jobs in Missouri are:

What cities in Missouri are hiring for Cpu Rtl Design Engineer jobs?

Cities in Missouri with the most Cpu Rtl Design Engineer job openings:

Senior Staff Engineer - AI Data Path

California, MO • On-site

$94K - $128K/yr

Other

Medical, Dental, Vision, PTO

Re-posted 21 days ago


Job description

We’re Looking for the Best and Brightest

We are the world’s leading data intelligence platform that reliably accelerates massive datasets for actionable real‑time insights. Join our team to help the best and brightest minds tackle the world’s biggest challenges in business, science, medicine, academia and government.

Do What Can’t be Done

For the past 20 years, our team has kept us at the forefront of storage technology and has provided the foundation for enabling researchers to push the limits of “what can be done.”

These innovations take research and discovery to the next level, enabling them to discover cures to disease, observe global warming patterns, model innovative automotive and aerospace designs, discover new sources of energy, make communities safer, and accelerate business results across a wide variety of industries.

DDN Helps Build Your Future, Too

At DDN, we understand our customers’ diverse needs. Whether you’re a data scientist, IT professional, executive, or researcher, our solutions empower you with cutting‑edge technology and unparalleled support.

Benefits
  • Highly Competitive Vacation Plans
  • Paid Holidays
  • Bonus Programs
  • Tuition Reimbursement
  • Employee Referral Program
  • Excellent Medical, Dental and Vision Benefits
  • Paid Leave Programs
  • Anniversary and Recognition Awards
Employment Type

Full time

Location Type

On-site

DDN is seeking a highly experienced Senior Staff Engineer specializing in AI Data Path & Storage to lead hands‑on development and integration of advanced storage systems with next‑generation AI inference pipelines. This role involves coding, prototyping, and rapidly iterating on solutions in close collaboration with architects to design and deliver high‑performance data movement architectures. You will leverage NVIDIA’s NIXL (Inference Transfer Library) alongside the Infinia Data Intelligence Platform to enable ultra‑low‑latency, high‑throughput data movement across GPU, memory, and distributed storage layers, including workloads involving KV cache management and vector database retrieval. The ideal candidate brings deep expertise in distributed storage, GPU data paths, and large‑scale system optimization, with a proven track record of building and shipping production‑grade AI infrastructure.

Key Responsibilities
  • Lead the design and implementation of high‑performance data movement pipelines using NVIDIA NIXL across GPU, CPU, and storage tiers.
  • Architect and drive integration of DDN Infinia with GPU‑accelerated inference platforms for large‑scale, real‑time AI workloads.
  • Own end‑to‑end optimization of I/O paths between GPU memory and storage using technologies such as NVIDIA GPUDirect Storage, RDMA, and NVMe‑over‑Fabrics.
  • Define and implement multi‑tier storage architectures (NVMe, SSD, object storage) optimized for inference latency, throughput, and scalability.
  • Lead development of advanced KV cache management strategies, including offloading, prefetching, and persistence across distributed storage layers.
  • Partner with AI/ML engineering teams to optimize inference performance in frameworks such as PyTorch and TensorFlow.
  • Establish benchmarking frameworks and lead performance tuning efforts for storage and data movement in production inference environments.
  • Diagnose and resolve complex system bottlenecks across storage, networking, and GPU subsystems.
  • Influence architecture decisions for distributed inference systems, ensuring scalability, resilience, and efficient data locality.
  • Drive engineering excellence through best practices in observability, performance monitoring, automation, and reliability engineering.
  • Mentor junior engineers and provide technical leadership across cross‑functional teams.
Required Qualifications
  • Bachelor’s or Master’s degree in Computer Science, Engineering, or a related field.
  • 12+ years of experience in storage systems, distributed systems, or performance engineering.
  • Proven track record of architecting and delivering large‑scale, high‑performance infrastructure systems.
  • Strong understanding of Linux I/O stack, filesystem internals, and storage protocols.
  • Extensive hands‑on experience with NVMe, SSD optimization, and high‑performance storage environments.
  • Strong experience with RDMA, InfiniBand, or other high‑speed data transfer technologies.
  • Solid understanding of GPU computing concepts and CPU‑GPU data movement patterns.
  • Proficiency in Python and/or C/C++, with advanced debugging, profiling, and performance tuning skills.
  • Demonstrated ability to optimize latency‑sensitive, high‑throughput production systems.
Preferred Skills
  • Hands‑on experience with NVIDIA NIXL or similar data movement frameworks.
  • Experience with GPU‑aware storage pipelines and GPUDirect Storage.
  • Strong understanding of AI inference systems, LLM serving architectures, and KV cache optimization.
  • Experience with Retrieval‑Augmented Generation (RAG) pipelines and open vector search ecosystems.
  • Background in high‑performance computing (HPC) or hyperscale distributed environments.
  • Expertise in caching strategies, memory tiering, and data locality optimization.
  • Experience designing disaggregated compute and storage architectures.
What You’ll Work On
  • Leading the evolution of storage systems into GPU‑native data layers for AI inference.
  • Building next‑generation distributed AI infrastructure using NIXL and Infinia.
  • Driving performance breakthroughs in real‑time LLM inference at scale.
  • Designing storage architectures for large‑scale AI datasets and retrieval systems.

We pride ourselves on our commitment to delivering tangible and consistent results.

Let’s Forge a Better Future, Together.

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