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Systemc Modeling Engineer Jobs (NOW HIRING)

Sandisk

Performance Architect

Milpitas, CA · On-site

$136.54K - $226.15K/yr

Build SystemC performance models for AI Storage Solutions based products covering end-to-end from ... Expertise in CUDA programming, GPU memory hierarchies, and hardware-specific optimizations * Proven ...

Intel

Custom Silicon Firmware Architect

Folsom, CA

Experience with SystemC/TLM modeling for firmware co-validation and architectural exploration ... The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable ...

Sandisk

Performance Architect

Milpitas, CA

$190.40K/yr

Build SystemC performance models for AI Storage Solutions based products covering end-to-end from ... Expertise in CUDA programming, GPU memory hierarchies, and hardware-specific optimizations * Proven ...

Intel

Custom Silicon Firmware Architect

Austin, TX

Experience with SystemC/TLM modeling for firmware co-validation and architectural exploration ... The Central Engineering Group (CEG) is Intel's data-driven organization that builds scalable ...

Sandisk

Performance Architect

Milpitas, CA · On-site

$190.40K/yr

Bachelors or Masters or PhD in Computer/Electrical Engineering with 5+ years of relevant experience in Performance Modeling, Simulation, and Analysis using SystemC * At least 5+ years of experience ...

Qualcomm

Engineer, Principal Manager

Santa Clara, CA · On-site

Engineering Group, Engineering Group > Software Engineering General Summary: This role is open to ... Oversee integration of models into SystemC-based simulators and broader software/firmware ...

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Systemc Modeling Engineer information

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$37K

$87.2K

$136.5K

How much do systemc modeling engineer jobs pay per year?

As of Jun 1, 2026, the average yearly pay for systemc modeling engineer in the United States is $87,220.00, according to ZipRecruiter salary data. Most workers in this role earn between $76,500.00 and $97,500.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a SystemC Modeling Engineer, and why are they important?

To excel as a SystemC Modeling Engineer, you need strong expertise in digital design, C++ programming, hardware description languages, and a background in electrical or computer engineering. Familiarity with SystemC libraries, simulation tools, and version control systems is typically required, and certifications in hardware modeling or verification can be advantageous. Effective problem-solving, attention to detail, and collaboration skills are essential soft skills that help you stand out. These competencies ensure accurate hardware modeling, efficient verification, and successful integration within engineering teams.

What are some common challenges faced by SystemC Modeling Engineers when collaborating with hardware and software teams?

SystemC Modeling Engineers often navigate the challenge of bridging the gap between hardware and software teams, as they must accurately represent hardware behavior in a way that is both functional for software development and reflective of real-world hardware constraints. Ensuring model fidelity while maintaining simulation performance is a delicate balance, especially when requirements change rapidly. Clear communication and iterative validation with both teams are essential to resolve ambiguities and synchronize development timelines.

What are SystemC Modeling Engineers?

SystemC Modeling Engineers are professionals who use the SystemC language to create high-level models of hardware systems, typically for simulation, verification, and architectural exploration in the electronics and semiconductor industries. They help bridge the gap between software and hardware design by modeling hardware components and behavior at different abstraction levels. Their work enables faster development cycles and analysis of system performance before committing to physical hardware design.

What is the difference between Systemc Modeling Engineer vs Hardware Design Engineer?

AspectSystemc Modeling EngineerHardware Design Engineer
Primary FocusDeveloping system-level models using SystemC for simulation and verificationDesigning and implementing hardware components and circuits
Required SkillsSystemC, C++, hardware architecture, modeling techniquesVHDL/Verilog, FPGA/ASIC design, circuit analysis
Work EnvironmentEmbedded systems, simulation labs, software developmentHardware labs, manufacturing facilities, design teams
Industry UsageElectronics, embedded systems, system architectureConsumer electronics, telecommunications, semiconductor industry

While both roles involve working with hardware and system design, the Systemc Modeling Engineer primarily focuses on creating high-level models for simulation and verification, whereas the Hardware Design Engineer concentrates on designing physical hardware components. Understanding these differences helps in choosing the right career path or job search focus.

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What cities are hiring for Systemc Modeling Engineer jobs? Cities with the most Systemc Modeling Engineer job openings:
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Systemc Modeling Engineer jobs near you
Infographic showing various Systemc Modeling Engineer job openings in the United States as of May 2026, with employment types broken down into 1% Internship, 67% Part Time, 1% Temporary, 29% Contract, 1% Nights, and 1% Summer. Highlights an 96% Physical, and 4% Hybrid job distribution, with an average salary of $87,220 per year, or $41.9 per hour.

Mixed-Signal Behavioral Modeling Engineer

K2 Space

Los Angeles, CA

$130K - $180K/yr

Full-time

Medical, Dental, Vision, Life, PTO

Posted yesterday

Job description

K2 is building the largest and highest-power satellites ever flown, unlocking performance levels previously out of reach across every orbit. Backed by $450M from leading investors including Altimeter Capital, Redpoint Ventures, T. Rowe Price, Lightspeed Venture Partners, Alpine Space Ventures, and others – with an additional $500M in signed contracts across commercial and US government customers – we're mass-producing the highest-power satellite platforms ever built for missions from LEO to deep space.

The rise of heavy-lift launch vehicles is shifting the industry from an era of mass constraint to one of mass abundance, and we believe this new era demands a fundamentally different class of spacecraft. Engineered to survive the harshest radiation environments and to fully capitalize on today's and tomorrow's massive rockets, K2 satellites deliver unmatched capability at constellation scale and across multiple orbits.

With multiple launches planned through 2026 and 2027, we're Building Bigger to develop the solar system and become a Kardashev Type II (K2) civilization. If you are a motivated individual who thrives in a fast-paced environment and you're excited about contributing to the success of a groundbreaking Series C space startup, we'd love for you to apply.

The Role

We are seeking a Mixed-Signal Behavioral Modeling Engineer to own the creation of behavioral modeling and drive mixed-signal verification methodology from the ground up. You will be part of a collaborative design team developing state-of-the-art mixed-signal SoCs to be hosted on some of the largest, most powerful, rapidly designed and rapidly manufactured satellites ever deployed in space. Your work will directly influence top-level integration and silicon tapeout success. This is a high-impact, technical role with significant ownership across modeling, methodology, verification, and cross-functional alignment with RF, analog, and digital teams.

Responsibilities

  • Develop high-level behavioral models for analog and mixed-signal IP (ADCs, DACs, PLLs, LDOs, RF front-end blocks, biasing, amplifiers, etc.).
  • Create abstracted models using Verilog, Verilog-AMS, or SystemVerilog.
  • Develop regression infrastructure and mixed-signal testbenches enabling co-simulation (digital + analog).
  • Integrate AMS models into digital verification environments (UVM-based).
  • Define and build the mixed-signal verification methodology for top-level SoC and subsystem verification.
  • Support architectural exploration through early-phase modeling and system-level simulations.
  • Collaborate with analog/RF designers to capture real-world analog behaviors and map them into accurate behavioral abstractions.
  • Work with digital and verification teams to ensure seamless integration of AMS models.
  • Provide modeling and verification insights during architectural reviews, PDR/CDR, and silicon bring-up.
  • Act as technical leader and subject-matter expert. 

Required Qualifications 

  • M.S. or Ph.D. in Electrical Engineering, Computer Engineering, or related field.
  • 2+ years of experience in analog/mixed-signal modeling and/or AMS verification.
  • Hands-on experience with SystemVerilog, Verilog-AMS, wreal/RNM, or equivalent modeling languages.
  • Strong understanding of analog/mixed-signal circuits (PLLs, LDOs, ADC/DACs, RF/IF paths, clocking, amplifiers).
  • Experience with mixed-signal co-simulation environments (Cadence AMS Designer, Synopsys VCS AMS, or similar).

Preferred Qualifications 

  • Experience building AMS verification methodologies from scratch.
  • Familiarity with UVM-based verification and digital design flows.
  • Knowledge of signal processing theory, RF system modeling, or communication systems.
  • Experience with MATLAB/Simulink, Python modeling, or SystemC AMS for high-level architectural modeling.
  • Experience working in cross-functional, geographically distributed teams.

Compensation and Benefits:

  • Base salary range for this role is $130,000 – $180,000 + equity in the company
  • Salary will be based on several factors including, but not limited to: knowledge and skills, education, and experience level
  • Comprehensive benefits package including paid time off, medical/dental/vision/ coverage, life insurance, paid parental leave, and many other perks

If you don't meet 100% of the preferred skills and experience, we encourage you to still apply! Building a spacecraft unlike any other requires a team unlike any other and non-traditional career twists and turns are encouraged!

If you need a reasonable accommodation as part of your application for employment or interviews with us, please let us know.

Export Compliance

As defined in the ITAR, "U.S. Persons" include U.S. citizens, lawful permanent residents (i.e., Green Card holders), and certain protected individuals (e.g., refugees/asylees, American Samoans). Please consult with a knowledgeable advisor if you are unsure whether you are a "U.S. Person."

The person hired for this role will have access to information and items controlled by U.S. export control regulations, including the export control regulations outlined in the International Traffic in Arms Regulation (ITAR). The person hired for this role must therefore either be a "U.S. person" as defined by 22 C.F.R. § 120.15 or otherwise eligible for a federally issued export control license.

Equal Opportunity

K2 Space is an Equal Opportunity Employer; employment with K2 Space is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.

About K2 Space

Sourced by ZipRecruiter

Industry

Guided missile and space vehicle manufacturing

Company size

11 - 50 Employees

Headquarters location

Los Angeles, CA, US

Year founded

2022

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