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Systemc Modeling Engineer Jobs in Texas (NOW HIRING)

Retym

Senior System C Engineer

Austin, TX · On-site

$99K - $135K/yr

Description We are seeking an experienced SystemC Engineer to join our ASIC development team ... The ideal candidate will have a strong background in SystemC modeling, digital signal processing ...

Mythic

Architecture Modeling Engineer

Austin, TX · On-site

$120K - $225K/yr

Create cycle-accurate models of the hardware (C++/SystemC). * Collaborate with peer engineering teams to co-design and co-verify the hardware implementation. * Investigate new architectural ideas ...

Mythic

Architecture Modeling Engineer

Austin, TX · On-site

$120K - $225K/yr

Create cycle-accurate models of the hardware (C++/SystemC). * Collaborate with peer engineering teams to co-design and co-verify the hardware implementation. * Investigate new architectural ideas ...

Mythic

Architecture Modeling Engineer

Austin, TX · On-site

$120K - $225K/yr

Create cycle-accurate models of the hardware (C++/SystemC). * Collaborate with peer engineering teams to co-design and co-verify the hardware implementation. * Investigate new architectural ideas ...

Ericsson

AI Model Architect

Austin, TX · On-site

This isn't prompt engineering. This is deep, architecture-level surgery - partitioning massive ... nce Modeling Experience with SystemC, Transaction-Level Modeling, or custom cycle-accurate ...

Neuralink

Digital IC Design Engineer

Austin, TX

$134K/yr

We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is ... Functional modeling experience and logic verification with SystemVerilog, SystemC/C++ * Experience ...

CYNET SYSTEMS

Verification Engineer 4

Austin, TX · On-site

$76 - $80/hr

Knowledge of Perl and Makefiles. * Experience in Verilog/SystemVerilog/SystemC, preferred ... Be familiar with hardware modeling and/or assertion-based verification methods. Nice to Have:

Neuralink

Digital IC Design Engineer

Austin, TX · On-site

$116K - $233K/yr

Our Digital IC Design Engineer will be responsible for delivering micro-architecture and register ... Functional modeling experience and logic verification with SystemVerilog, SystemC/C++ * Experience ...

Neuralink

Hardware/ Software Co-Design Engineer

Austin, TX · On-site

$151K - $261K/yr

We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is ... Functional modeling experience and logic verification with SystemVerilog, SystemC/C++ * Experience ...

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Systemc Modeling Engineer information

What is a SystemC Modeling Engineer?

SystemC Modeling Engineers are professionals who use the SystemC language to create high-level models of hardware systems, typically for simulation, verification, and architectural exploration in the electronics and semiconductor industries. They help bridge the gap between software and hardware design by modeling hardware components and behavior at different abstraction levels. Their work enables faster development cycles and analysis of system performance before committing to physical hardware design.

What are the key skills and qualifications needed to thrive as a SystemC Modeling Engineer?

To excel as a SystemC Modeling Engineer, you need strong expertise in digital design, C++ programming, hardware description languages, and a background in electrical or computer engineering. Familiarity with SystemC libraries, simulation tools, and version control systems is typically required, and certifications in hardware modeling or verification can be advantageous. Effective problem-solving, attention to detail, and collaboration skills are essential soft skills that help you stand out. These competencies ensure accurate hardware modeling, efficient verification, and successful integration within engineering teams.

What are some common challenges faced by SystemC Modeling Engineers when collaborating with hardware and software teams?

SystemC Modeling Engineers often navigate the challenge of bridging the gap between hardware and software teams, as they must accurately represent hardware behavior in a way that is both functional for software development and reflective of real-world hardware constraints. Ensuring model fidelity while maintaining simulation performance is a delicate balance, especially when requirements change rapidly. Clear communication and iterative validation with both teams are essential to resolve ambiguities and synchronize development timelines.

What is the difference between Systemc Modeling Engineer vs Hardware Design Engineer?

AspectSystemc Modeling EngineerHardware Design Engineer
Primary FocusDeveloping system-level models using SystemC for simulation and verificationDesigning and implementing hardware components and circuits
Required SkillsSystemC, C++, hardware architecture, modeling techniquesVHDL/Verilog, FPGA/ASIC design, circuit analysis
Work EnvironmentEmbedded systems, simulation labs, software developmentHardware labs, manufacturing facilities, design teams
Industry UsageElectronics, embedded systems, system architectureConsumer electronics, telecommunications, semiconductor industry

While both roles involve working with hardware and system design, the Systemc Modeling Engineer primarily focuses on creating high-level models for simulation and verification, whereas the Hardware Design Engineer concentrates on designing physical hardware components. Understanding these differences helps in choosing the right career path or job search focus.

What are popular job titles related to Systemc Modeling Engineer jobs in Texas?

For Systemc Modeling Engineer jobs in Texas, the most frequently searched job titles are:

What job categories do people searching Systemc Modeling Engineer jobs in Texas look for?

The top searched job categories for Systemc Modeling Engineer jobs in Texas are:

Systemc Modeling Engineer jobs near you
Infographic showing various Systemc Modeling Engineer job openings in Texas as of August 2026, with employment types broken down into 94% Full Time, 3% Part Time, and 3% Contract. Highlights an 85% Physical, 6% Hybrid, and 9% Remote job distribution.

Senior System C Engineer

Austin, TX • On-site

Retym
See more jobs at Retymexternal

$99K - $135K/yr

Full-time

Posted 10 days ago

Job description

Description
We are seeking an experienced SystemC Engineer to join our ASIC development team. The ideal candidate will have a strong background in SystemC modeling, digital signal processing (DSP), and ASIC development flows. This role involves developing high-level SystemC models, translating DSP algorithms into efficient SystemC implementations, and working closely with architecture, System, RTL, verification, and algorithm teams to enable system-level modeling and verification.
Requirements
Responsibilities
* Develop and maintain high-performance SystemC models for complex optical systems and ASIC designs.
* Translate DSP algorithms from MATLAB into accurate and efficient SystemC implementations.
* Translate optical systems modeling into SystemC models
* Collaborate with architecture, RTL, and verification teams throughout the ASIC development lifecycle.
* Develop executable reference models for architecture exploration and functional validation.
* Support verification environments by integrating SystemC models into mixed-language simulation environments.
* Analyze and optimize model performance while ensuring functional accuracy.
* Debug and resolve functional issues across system-level.
* Participate in architecture definition, design reviews, and technical discussions.
Required Qualifications
* Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
* Minimum 5 years of experience in SystemC development.
* Strong proficiency in SystemC, C++, and Transaction-Level Modeling (TLM).
* Experience with ASIC design and verification environments.
* Experience translating DSP algorithms from MATLAB to SystemC.
* Knowledge of digital signal processing concepts and fixed-point arithmetic.
* Hands-on experience with communication interfaces, including:
* Ethernet
* DSP-based communication systems
* Optical links/high-speed serial interfaces
* Strong debugging, analytical, and problem-solving skills.
* Excellent communication skills and ability to work in cross-functional engineering teams.
Preferred Qualifications
* Experience with UVM and SystemVerilog verification environments.
* Familiarity with RTL design (Verilog/SystemVerilog/VHDL).
* Experience with high-speed networking or communication ASICs.
* Knowledge of scripting languages such as Python or Perl.
* Experience with performance modeling and architectural exploration.
* Familiarity with version control systems (Git) and continuous integration workflows.
Desired Skills
* Strong system-level thinking and architectural understanding.
* Ability to work independently while collaborating across multidisciplinary teams.
* Attention to detail with a focus on model accuracy and maintainability.
* Passion for solving complex technical challenges in ASIC and communication system development.

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