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Systemc Modeling Engineer Jobs in Texas (NOW HIRING)

CesiumAstro

Senior FPGA Verification Engineer I

Austin, TX

$128K - $165K/yr

Work with the modeling and scientific staff to implement DPI-C dataplane verification interfaces ... SystemC, UVM/UVMf, DPI-C, TLM, Formal CDC and functional analysis, QEMU and VIP. * Expert-level ...

CesiumAstro

Senior FPGA Verification Engineer I

Austin, TX

$128K - $165K/yr

Work with the modeling and scientific staff to implement DPI-C dataplane verification interfaces ... SystemC, UVM/UVMf, DPI-C, TLM, Formal CDC and functional analysis, QEMU and VIP. * Expert-level ...

Nvidia

Senior Hardware SoC Architect

Austin, TX

It will also require a strong background in System C-modeling and scripting and an interest in ... Strong C++/SystemC experience * Excellent written, verbal and negotiation skills, to work with ...

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Systemc Modeling Engineer information

What are SystemC Modeling Engineers?

SystemC Modeling Engineers are professionals who use the SystemC language to create high-level models of hardware systems, typically for simulation, verification, and architectural exploration in the electronics and semiconductor industries. They help bridge the gap between software and hardware design by modeling hardware components and behavior at different abstraction levels. Their work enables faster development cycles and analysis of system performance before committing to physical hardware design.

What are some common challenges faced by SystemC Modeling Engineers when collaborating with hardware and software teams?

SystemC Modeling Engineers often navigate the challenge of bridging the gap between hardware and software teams, as they must accurately represent hardware behavior in a way that is both functional for software development and reflective of real-world hardware constraints. Ensuring model fidelity while maintaining simulation performance is a delicate balance, especially when requirements change rapidly. Clear communication and iterative validation with both teams are essential to resolve ambiguities and synchronize development timelines.

What is the difference between Systemc Modeling Engineer vs Hardware Design Engineer?

AspectSystemc Modeling EngineerHardware Design Engineer
Primary FocusDeveloping system-level models using SystemC for simulation and verificationDesigning and implementing hardware components and circuits
Required SkillsSystemC, C++, hardware architecture, modeling techniquesVHDL/Verilog, FPGA/ASIC design, circuit analysis
Work EnvironmentEmbedded systems, simulation labs, software developmentHardware labs, manufacturing facilities, design teams
Industry UsageElectronics, embedded systems, system architectureConsumer electronics, telecommunications, semiconductor industry

While both roles involve working with hardware and system design, the Systemc Modeling Engineer primarily focuses on creating high-level models for simulation and verification, whereas the Hardware Design Engineer concentrates on designing physical hardware components. Understanding these differences helps in choosing the right career path or job search focus.

What are the key skills and qualifications needed to thrive as a SystemC Modeling Engineer, and why are they important?

To excel as a SystemC Modeling Engineer, you need strong expertise in digital design, C++ programming, hardware description languages, and a background in electrical or computer engineering. Familiarity with SystemC libraries, simulation tools, and version control systems is typically required, and certifications in hardware modeling or verification can be advantageous. Effective problem-solving, attention to detail, and collaboration skills are essential soft skills that help you stand out. These competencies ensure accurate hardware modeling, efficient verification, and successful integration within engineering teams.
What are popular job titles related to Systemc Modeling Engineer jobs in Texas? For Systemc Modeling Engineer jobs in Texas, the most frequently searched job titles are:
What job categories do people searching Systemc Modeling Engineer jobs in Texas look for? The top searched job categories for Systemc Modeling Engineer jobs in Texas are:
Systemc Modeling Engineer jobs near you
Infographic showing various Systemc Modeling Engineer job openings in Texas as of June 2026, with employment types broken down into 100% Full Time. Highlights an 92% In-person, and 8% Remote job distribution.
Principal Verification Engineer I

Principal Verification Engineer I

CesiumAstro

Austin, TX • On-site

Full-time

Posted 25 days ago

Job description

Please Note: To conform with the United States Government Space Technology Export Regulations, the applicant must be a U.S. citizen, lawful permanent resident of the U.S., conditional resident, asylee or refugee (protected individuals as defined by 8 U.S.C. 1324b(a)(3)), or eligible to obtain the required authorizations from the U.S. Department of State.

At CesiumAstro, we are developers and pioneers of out-of-the-box communication systems for satellites, UAVs, launch vehicles, and other space and airborne platforms. We take pride in our dynamic and cross-functional work environment, which allows us to learn, develop, and engage across our organization. If you are looking for hands-on, interactive, and autonomous work, CesiumAstro is the place for you. We are actively seeking passionate, collaborative, energetic, and forward-thinking individuals to join our team.

We are looking to add a Principal Verification Engineer I to our team. If you enjoy working in a startup environment and are passionate about developing leading-edge phased arrays for satellites, spacecraft, and aerospace systems, we would like to hear from you.
JOB DUTIES AND RESPONSIBILITIES
  • Lead the evaluation and technical implementation of FPGA and digital design simulation, verification and emulation infrastructure.
  • Lead the development, maintenance and phased deployment of continuous integration and regression testing infrastructure.
  • Develop state-of-the-art UVMf-based top-level and module-level testbenches using block-to-top best practices for reusability, including both control and data plane stimulation using VIP & System Verilog DPI-C integration with existing MATLAB and Python numerical models.
  • Lead the development of reusable custom VIP modules.
  • Work closely with the engineering and senior leadership teams to train and mentor engineers at all experience levels on UVMf testbench usage and modern approaches to FPGA/digital design. Work with the modeling and scientific staff to implement DPI-C dataplane verification interfaces into existing MATLAB and Python models.
  • Regularly communicate and present on the current state of verification in the industry, and at the company.
  • Continually evaluate current processes regarding FPGA and digital design with a focus on Xilinx TLM models and QEMU-RP integration.
  • Work closely with vendors to define requirements of future simulation model deliverables.
  • Maintain up-to-date knowledge of industry best-practices regarding FPGA and digital design methodologies.
  • Work closely with the engineering leadership team to evaluate and non-disruptively implement process improvements.
JOB REQUIREMENTS AND MINIMUM QUALIFICATIONS
  • A Bachelor of Science (BS) or Master of Science (MS) degree in Computer Science, Electrical Engineering, or Computer Engineering or related engineering discipline.
  • Minimum of 9 years of industry experience in verification and automation.
  • Expert-level knowledge of FPGA digital design verification techniques including VHDL, Verilog, SystemVerilog, C/C++, SystemC, UVM/UVMf, DPI-C, TLM, Formal CDC and functional analysis, QEMU and VIP.
  • Expert-level knowledge of digital design automation infrastructure, including CI, regression testing and HIL testing.
  • Advanced-level knowledge of Linux.
  • Advanced-level knowledge of vendor-provided FPGA development tools with a focus on Xilinx tools.
  • Desire and ability to train and mentor while maintaining a positive and productive attitude.
  • A deep sense of ownership of your work, and for the success of the company.
CesiumAstro considers several factors when extending an offer, including but not limited to, the role and associated responsibilities, a candidate’s work experience, education/training, and key skills.  Full-time employment offers include company stock options and a generous benefits package including health, dental, vision, HSA, FSA, life, disability and retirement plans.  
 
CesiumAstro is an Equal Opportunity employer.  All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability, protected Veteran Status, or any other characteristic protected by applicable federal, state, or local law.

Please note: CesiumAstro does not accept unsolicited resumes from contract agencies or search firms. Any unsolicited resumes submitted to our website or to CesiumAstro team members will be considered property of CesiumAstro, and we will not be obligated to pay any referral fees.

We may use artificial intelligence (AI) tools to support parts of the hiring process, such as reviewing applications, analyzing resumes, or assessing responses. These tools assist our recruitment team but do not replace human judgment. Final hiring decisions are ultimately made by humans. If you would like more information about how your data is processed, please contact us.