ASIC & FPGA Design Engineer Sr
$114K - $158K/yr
Building comprehensive test plans, simulation models, and verification environments (UVM, SystemC ... Mentoring junior engineers, championing best practice FPGA development, verification, and ...
$114K - $158K/yr
Building comprehensive test plans, simulation models, and verification environments (UVM, SystemC ... Mentoring junior engineers, championing best practice FPGA development, verification, and ...
$114K - $158K/yr
Building comprehensive test plans, simulation models, and verification environments (UVM, SystemC ... Mentoring junior engineers, championing best practice FPGA development, verification, and ...
$114K - $158K/yr
Building comprehensive test plans, simulation models, and verification environments (UVM, SystemC ... Mentoring junior engineers, championing best practice FPGA development, verification, and ...
$114K - $158K/yr
Building comprehensive test plans, simulation models, and verification environments (UVM, SystemC ... Mentoring junior engineers, championing best practice FPGA development, verification, and ...
Orlando, FL · On-site
$114K - $158K/yr
... models, and verification environments (UVM, SystemC, Python based testbenches) to prove functional correctness and timing margins. • Leading hardware in the loop (HIL) tests, board level debugging ...
Orlando, FL · On-site
$114K - $158K/yr
... models, and verification environments (UVM, SystemC, Python based testbenches) to prove functional correctness and timing margins. • Leading hardware in the loop (HIL) tests, board level debugging ...
| Aspect | Systemc Modeling Engineer | Hardware Design Engineer |
|---|---|---|
| Primary Focus | Developing system-level models using SystemC for simulation and verification | Designing and implementing hardware components and circuits |
| Required Skills | SystemC, C++, hardware architecture, modeling techniques | VHDL/Verilog, FPGA/ASIC design, circuit analysis |
| Work Environment | Embedded systems, simulation labs, software development | Hardware labs, manufacturing facilities, design teams |
| Industry Usage | Electronics, embedded systems, system architecture | Consumer electronics, telecommunications, semiconductor industry |
While both roles involve working with hardware and system design, the Systemc Modeling Engineer primarily focuses on creating high-level models for simulation and verification, whereas the Hardware Design Engineer concentrates on designing physical hardware components. Understanding these differences helps in choosing the right career path or job search focus.

$114K - $158K/yr
Other
Re-posted 26 days ago
8.1
Based on 390 frontline employees who took The Breakroom Quiz
38th of 71 rated aerospace companies
You will be the Senior ASIC & FPGA Design Engineer for the Command Launch Assembly (CLA) FPGA team within Missiles&Fire Control (MFC). Our team delivers the digital heart beat that powers the Next Generation Short Range Interceptor (NGSRI), turning system level performance and safety goals into reliable, production ready FPGA hardware for the United States and allied forces.
What You Will Be Doing
As the senior ASIC & FPGA designer you will own the full lifecycle of the CLA FPGA-from high level architecture through release ready documentation-while mentoring junior talent and partnering with a broad set of cross functional experts. Your responsibilities will include:
Defining FPGA architecture and drafting design specifications; writing clean RTL in VHDL/Verilog/SystemVerilog that satisfies performance, power, and reliability targets.
Developing synthesis, place and route, and timing closure strategies to guarantee deterministic operation on the chosen FPGA families.
Building comprehensive test plans, simulation models, and verification environments (UVM, SystemC, Python based testbenches) to prove functional correctness and timing margins.
Leading hardware in the loop (HIL) tests, board level debugging, and subsystem integration activities.
Translating system level performance, safety, and reliability requirements into detailed FPGA architectures and resource utilization studies.
Conducting timing analysis, power budgeting, and device selection optimization.
Managing configuration control with GitLab (or equivalent), maintaining version controlled repositories, and ensuring full traceability of all design artifacts.
Producing complete design packages-specifications, test plans, verification reports, and release documentation-compliant with aerospace and LockheedMartin command media standards.
Collaborating with systems, software, hardware, mechanical, test, manufacturing, and quality teams to keep the program on schedule and within performance envelopes.
Mentoring junior engineers, championing best practice FPGA development, verification, and configuration management processes.
Why Join Us
Do you want to be part of a company culture that empowers employees to think big, lead with a growth mindset, and make the impossible a reality? We provide the resources and give you the flexibility to enable inspiration and focus. If you have the passion and courage to dream big, work hard, and have fun doing what you love then we want to build a better tomorrow with you.
We offer flexible work schedules to comprehensive benefits investing in your future and security, Learn more about Lockheed Martin's comprehensive benefits package here.
Further Information About This Opportunity:
This position is in Orlando. Discover more about our Orlando, Florida location.
MUST BE A U.S. CITIZEN - This position is located at a facility that requires special access. The selected candidate must be able to obtain a secret clearance
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As a global security and aerospace company, the majority of Lockheed Martin's business is with the U.S. Department of Defense and U.S. federal government agencies.The remaining portion of Lockheed Martin's business is comprised of international government and commercial sales of products, services and platforms.
Manufacturing
10,000+ Employees
Bethesda, MD, US
1912