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Senior Ic Layout Design Engineer Jobs (NOW HIRING)

IC Enable

IC Layout Design Engineer

Richardson, TX · Hybrid

The team has an exciting opportunity for a IC Layout Design Engineer V to join our diverse team executing full-custom integrated circuit development with specific responsibility for driving the ...

Neuralink

Analog IC Layout Engineer

Fremont, CA

... chip design with advanced architectures and hardware accelerators with a goal of enhancing the ... As an Analog IC Layout Engineer, your responsibilities will include: * Crafting state-of-the-art ...

Teledyne

Senior IC Design Engineer

Chestnut Ridge, NY

$113.60K - $151.40K/yr

The Senior IC Design Engineer will collaborate closely with other members of the IC design team. Often, multiple designers are working together on one chip. Whether or not designers are working ...

Neuralink

Analog IC Layout Engineer

Fremont, CA · On-site

$83K - $139K/yr

As an Analog IC Layout Engineer, your responsibilities will include: * Crafting state-of-the-art ... Experience with layout P-cell design and implementation * Experience with layout automation ...

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How much do senior ic layout design engineer jobs pay per year?

As of Jun 1, 2026, the average yearly pay for senior ic layout design engineer in the United States is $121,466.00, according to ZipRecruiter salary data. Most workers in this role earn between $95,000.00 and $138,500.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Senior IC Layout Design Engineer, and why are they important?

A Senior IC Layout Design Engineer requires expertise in analog and digital layout design, semiconductor device physics, and a relevant engineering degree, often with several years of industry experience. Proficiency in EDA tools such as Cadence Virtuoso, Mentor Graphics, and knowledge of DRC/LVS verification flows are typically expected. Attention to detail, problem-solving abilities, and effective communication are crucial soft skills for collaborating with cross-functional teams and ensuring design accuracy. These skills and qualifications are essential for creating high-performance, reliable integrated circuits that meet stringent specifications and industry standards.

What are some common challenges Senior IC Layout Design Engineers face when collaborating with cross-functional teams?

Senior IC Layout Design Engineers often work closely with circuit designers, verification engineers, and process engineers. A common challenge is ensuring that layout constraints align with the circuit’s performance requirements while also meeting manufacturing design rules and timelines. Effective communication and quick resolution of conflicting priorities are crucial, as design iterations can be frequent. Developing strong collaborative relationships and maintaining detailed documentation can help overcome these challenges and lead to successful project outcomes.

What does a Senior IC Layout Design Engineer do?

A Senior IC Layout Design Engineer is responsible for designing the physical layout of integrated circuits (ICs) based on schematic diagrams and electrical requirements. They use specialized software tools to arrange transistors, resistors, and other components on a silicon chip, ensuring optimal performance, manufacturability, and adherence to design rules. In addition, they often lead layout projects, review the work of junior engineers, and collaborate closely with circuit designers and verification teams to meet technical specifications and project deadlines.
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Senior Ic Layout Design Engineer jobs near you
Infographic showing various Senior Ic Layout Design Engineer job openings in the United States as of May 2026, with employment types broken down into 33% Full Time, 25% Part Time, and 42% Contract. Highlights an 92% Physical, and 8% Remote job distribution, with an average salary of $121,466 per year, or $58.4 per hour.
IC Layout Design Engineer

IC Layout Design Engineer

IC Enable

Richardson, TX • Hybrid

Full-time

Medical, Dental, Vision, Retirement

Posted 18 days ago

Job description

For over 20 years IC Enable has successfully provided design IP, IC products, services, and platform solutions to demanding customers ranging from startups to Fortune 50 members. Our design and product offerings focus on high reliability, mixed-signal and digital markets while our platform solutions focus on IDM, foundry and IP providers. Now is an exciting time to join our team as we continue to change the industry through experience in technology development, full-custom ASIC / SOC and electronics development across the Semiconductor, Medical and Defense industries, including some of the most challenging fabrication processes and product applications.

Expand on your career in Integrated Circuit Layout Design with IC Enable. The team has an exciting opportunity for a IC Layout Design Engineer V to join our diverse team executing full-custom integrated circuit development with specific responsibility for driving the layout and verification on complex, high-performance circuits with applications such as PLL, HSC, AGC, SerDes, ADC/DAC, Wireless systems, and custom logic. This position is best suited for a junior-mid level engineer who is hungry, humble and smart and is excited about growing his or her skillset in integrated circuit layout design and physical design.

Job Location and Work Mode:
  • Richardson, TX (Hybrid; In Office 3 Days A Week)
  • Remote eligibility available for qualified candidates, up to managements discretion

The best fit candidate for this position will have:

  • 3-5 years experience in layout and verification tools and methodologies for RF/Analog/Mixed Signal ICs
  • 3-5 years experience in Cadence layout (Virtuoso, VXL) and Calibre verification (ERC, DRC, LVS)
  • Demonstrated success in delivering quality work product
  • FinFET or GAA preferred, but not required
  • Debugging and analytical skills with complex technical concepts
  • Experience in DFM hierarchical layout construction for efficient verification and integration
  • Must understand techniques for managing layout dependent effects i.e. IR drop, RC delay, electron-migration, self- heating and crosstalk
  • Comprehensive understanding of matching, shielding, guard rings and latch up
  • Proficiency in PERL or SKILL scripting is a plus
  • Strong verbal and written communication
  • Bachelor’s Degree in Electrical Engineering or Applicable Field

While working with our team you will be responsible for:

  • Delivering on project assignments with integrity, commitment, and excellence
  • Efficiently laying out sensitive RF, Analog and Mixed Signal circuits conforming to all physical design verification (PDV) requirements while balancing demanding area, performance, and power specifications
  • Identifying quality and reliability improvements in IC circuit and layout design
  • Supporting or performing design verification from sub-block up through top-level
  • Collaborating effectively with local and remote team members
  • Developing accurate layout design schedules and resource estimates
  • Proactively looking for continuous improvement opportunities in the flow, layout and design methodologies
At IC Enable we know that our most valuable asset is our team. We are seeking a candidate who is ready to dive in to our culture and grow with our team. We build our team around those that are humble, hungry and smart!
IC Enable benefits include Medical, Dental, Vision and Ancillary benefits, 401K Plan with Company Match program.

IC Enable is an Equal Opportunity Employer

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About IC Enable

Sourced by ZipRecruiter

Industry

Semiconductor and electronic component manufacturing

Company size

51 - 200 Employees

Headquarters location

Dallas, TX, US

Year founded

2004

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