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Senior Ic Layout Design Engineer Jobs (NOW HIRING)

Job Summary: We are seeking an experienced Senior Analog/Mixed-Signal Layout Design Engineer to ... Develop high-quality analog/mixed-signal IC layouts and create GDS databases of completed designs ...

Senior RFIC Layout Engineer

Atlanta, GA · On-site

$100K - $138K/yr

Falcomm is seeking a Senior RFIC Layout Engineer to support the physical implementation of RF and ... IC layouts for RF front-end circuits while ensuring compliance with foundry design rules and ...

Senior RFIC Layout Engineer

Atlanta, GA · On-site

$100K - $138K/yr

Falcomm is seeking a Senior RFIC Layout Engineer to support the physical implementation of RF and ... IC layouts for RF front-end circuits while ensuring compliance with foundry design rules and ...

Senior RFIC Layout Engineer

Atlanta, GA · On-site

$100K - $138K/yr

Falcomm is seeking a Senior RFIC Layout Engineer to support the physical implementation of RF and ... IC layouts for RF front-end circuits while ensuring compliance with foundry design rules and ...

The Integrated Circuit Engineer designs and develops microwave, analog, digital, and mixed-signal ... IC layout execution and supervision of IC layout design specialists. * Works with characterization ...

Senior RFIC Layout Engineer

Atlanta, GA

$100K - $138K/yr

Falcomm is seeking a Senior RFIC Layout Engineer to support the physical implementation of RF and ... IC layouts for RF front-end circuits while ensuring compliance with foundry design rules and ...

The Integrated Circuit Engineer designs and develops microwave, analog, digital, and mixed-signal ... IC layout execution and supervision of IC layout design specialists. * Works with characterization ...

OR · Hybrid

We are looking for a Senior Mask Layout Design Engineer - someone who is excited to join a growing group of diverse individuals responsible for handling high-speed mixed-signal circuit designs!

The Integrated Circuit Engineer designs and develops microwave, analog, digital, and mixed-signal ... IC layout execution and supervision of IC layout design specialists. * Works with characterization ...

IC Layout Designer Technician Experience Level: Support Job Type: Regular Location: Richardson, TX, ... You will work independently and partner closely with Design, Process, and Software Engineers to ...

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Senior Ic Layout Design Engineer information

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How much do senior ic layout design engineer jobs pay per year?

As of Jun 6, 2026, the average yearly pay for senior ic layout design engineer in the United States is $121,466.00, according to ZipRecruiter salary data. Most workers in this role earn between $95,000.00 and $138,500.00 per year, depending on experience, location, and employer.

What does a Senior IC Layout Design Engineer do?

A Senior IC Layout Design Engineer is responsible for designing the physical layout of integrated circuits (ICs) based on schematic diagrams and electrical requirements. They use specialized software tools to arrange transistors, resistors, and other components on a silicon chip, ensuring optimal performance, manufacturability, and adherence to design rules. In addition, they often lead layout projects, review the work of junior engineers, and collaborate closely with circuit designers and verification teams to meet technical specifications and project deadlines.

What are the key skills and qualifications needed to thrive as a Senior IC Layout Design Engineer, and why are they important?

A Senior IC Layout Design Engineer requires expertise in analog and digital layout design, semiconductor device physics, and a relevant engineering degree, often with several years of industry experience. Proficiency in EDA tools such as Cadence Virtuoso, Mentor Graphics, and knowledge of DRC/LVS verification flows are typically expected. Attention to detail, problem-solving abilities, and effective communication are crucial soft skills for collaborating with cross-functional teams and ensuring design accuracy. These skills and qualifications are essential for creating high-performance, reliable integrated circuits that meet stringent specifications and industry standards.

What are some common challenges Senior IC Layout Design Engineers face when collaborating with cross-functional teams?

Senior IC Layout Design Engineers often work closely with circuit designers, verification engineers, and process engineers. A common challenge is ensuring that layout constraints align with the circuit’s performance requirements while also meeting manufacturing design rules and timelines. Effective communication and quick resolution of conflicting priorities are crucial, as design iterations can be frequent. Developing strong collaborative relationships and maintaining detailed documentation can help overcome these challenges and lead to successful project outcomes.
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Staff Analog IC Layout Engineer

Staff Analog IC Layout Engineer

Elevate Semiconductor

San Diego, CA • On-site

$120K - $180K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Posted 10 days ago


Job description

Elevate Semiconductor is at the forefront of shaping the future of semiconductor technology, driving innovation to enable the next generation of testing. We deliver comprehensive solutions that streamline semiconductor testing, empowering faster time-to-market and enhanced capabilities. Our diverse product portfolio includes standard, semi-custom, and custom SKUs, all engineered for longevity and compatibility across evolving technological advancements. By focusing on low-power, high-density designs, we aim to lower the cost of testing while exceeding expectations on every project.
Join us in advancing the cutting edge of semiconductor innovation!
The Position
We are seeking a highly skilled Staff Analog Layout Engineer to join our team in developing state-of-the-art integrated circuits (ICs). In this role, you will handle the physical layout and verification of highly complex, high-voltage, and mixed-signal solutions using advanced process technologies, ranging from 65nm CMOS to 100+V BCD. You will collaborate with a cross-functional team to optimize silicon design, leveraging mentorship and support from senior engineers to deliver innovative and cost-effective solutions.
Must be able to work onsite in San Diego,CA.
Responsibilities
  • Performing physical layout of analog and mixed-signal integrated circuits at the block and chip level
  • Conducting floorplanning and placement of circuit components to optimize area, performance, and power
  • Verifying layouts using industry-standard tools for LVS (Layout vs. Schematic) and DRC (Design Rule Checking) to ensure compliance with process design rules
  • Collaborating closely with design engineers to understand circuit specifications and ensure layout accuracy
  • Working with cross-functional teams, including digital design and packaging, to optimize overall chip performance
  • Troubleshooting and resolving issues related to layout verification and manufacturing

Requirements
  • Bachelor's degree in Electrical Engineering or a related field
  • Minimum of 8 years of professional experience in analog and mixed-signal IC layout design
  • Strong knowledge of analog CMOS circuits and device physics fundamentals
  • Solid understanding of the IC design, qualification, and manufacturing lifecycle
  • Hands-on experience with industry-standard EDA tools for analog and mixed-signal design (e.g., Cadence, Mentor Graphics, Tanner)
  • Proficiency in performing LVS and DRC verification using Cadence or Mentor tools

Preferences
  • Layout experience with STI High voltage (100V+) BCD and LDMOS processes
  • Layout experience with mixed voltage (multiple supply rails, 6 or more) domains
  • Layout experience with high speed multi Gbps circuits.
  • Layout experience in ultra-high accuracy and precision circuits.
  • Layout experience with high resolution data converters.
  • Layout experience with BiCMOS process technology.
  • Programming and scripting ability a strong plus, particularly in SKILL and Calibre scripts

Why Join Us?
At Elevate Semiconductor, you'll be part of a dynamic team working on innovative technologies that shape the future of the semiconductor industry. We offer competitive compensation, comprehensive benefits, and opportunities for professional growth in a collaborative environment.
Apply Today!
If you are passionate about digital design and eager to contribute to groundbreaking semiconductor solutions, we want to hear from you!
Benefits
  • 100% Employer Paid Health Insurance (Medical, Dental, Vision)
  • Unlimited Paid Time Off
  • Performance Bonuses
  • Free Lunch Catered in by Local Restaurants
  • Private Equity Options
  • Retirement Plans
  • Sabbatical Program
  • Tuition Reimbursement
  • Volunteer Days
  • Relocation Assistance
  • Conference Attendance Support
  • Biweekly Phone Stipend
  • Employee Assistance Program

The salary range for this role is $120,000-$180,000.00.
Please note: While a salary range is provided, the final compensation will depend on your experience, skill set, and how well you're able to highlight your background throughout the interview process.