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Physical Design Jobs (NOW HIRING)

DensityAI

Physical Design Engineer

Mountain View, CA · On-site

$160K - $165K/yr

About the role Own floorplan-to-signoff physical design for one or more blocks of our AI accelerator silicon. Work with chip-design and software teams driving DensityAI's AI accelerator program from ...

Apple

Physical Design Engineer

Cupertino, CA · On-site

$167K - $172K/yr

We have an opportunity for a forward-thinking and unusually hardworking Physical Design Engineer. As a member of our wide-ranging group, you will have the rare and great opportunity to craft upcoming ...

Apple Inc.

Physical Design Engineer

Cupertino, CA · On-site

$129.30 - $225.30/hr

Description As a Physical Design engineer you will contribute to all phases of physical design of high performance PHY design from RTL to delivery of our final GDSII. Your responsibilities include ...

The PJF Group

Physical Design Engineer

Bodega Bay, CA

$180K - $230K/yr

We're looking for a hands-on Physical Design Engineer to support complex SoC projects for our client who designs and delivers advanced System-on-Chip solutions across multiple emerging technologies.

iFlow Inc

Physical Design Engineer

Sunnyvale, CA · On-site

$159K - $164K/yr

Physical Design Engineer Location:Sunnyvale, CA OR Austin,TX Duration: Long term experience: 5-18 years only ( No 18+ years profile) Job Overview: We are looking for a highly skilled Physical Design ...

The PJF Group

Physical Design Engineer

Bodega Bay, CA

$161K - $166K/yr

We're looking for a hands-on Physical Design Engineer to support complex SoC projects for our client who designs and delivers advanced System-on-Chip solutions across multiple emerging technologies.

Altera Corporation

Physical Design Engineer

San Jose, CA · On-site

$133K - $192K/yr

About the Role We are seeking a Physical Design Engineer to join our Silicon Engineering and Physical Design organization. In this role, you will be responsible for implementing advanced custom IP ...

Quest Global

Physical Design Manager

Santa Clara, CA · On-site

$158K - $163K/yr

Role - Physical Design Manager Location - Santa Clara, CA, USA Work Experience What You will Do: * Drive physical design flow: synthesis, floorplanning, placement, CTS, routing, timing closure.

AIT Global, Inc.

Physical Design Engineer

San Francisco, CA · On-site

$160K - $164K/yr

Job Title: Physical Design Engineer Location: San Francisco, CA (Bay Area) * Good understanding of Cadence tools (Innovous, Quantus, Voltus). (Must) * Deep knowledge about industry standards in ...

New

Apple

Physical Design Engineer

Bodega Bay, CA · On-site

$150K - $277K/yr

Description As a Physical Design engineer you will contribute to all phases of physical design of high performance PHY design from RTL to delivery of our final GDSII. Your responsibilities include ...

Cerebras

Physical Design Engineer

Sunnyvale, CA · On-site

$230 - $280/hr

About The Role As a member of our tight knit physical design team, you will be working on the design and analysis of 3D integrated products. This role involves a combination of traditional ASIC/SoC ...

Apple

Physical Design Engineer

Cupertino, CA

$129K - $225K/yr

Description As a Physical Design engineer you will contribute to all phases of physical design of high performance PHY design from RTL to delivery of our final GDSII.","responsibilities":"Generate ...

Apple

Physical Design Engineer

Bodega Bay, CA · On-site

$150K - $277K/yr

Description As a Physical Design engineer you will contribute to all phases of physical design of high performance PHY design from RTL to delivery of our final GDSII.","responsibilities":"Your ...

Apple

Physical Design Engineer

Cupertino, CA

$184K - $324K/yr

Description As a Physical Design engineer you will contribute to all phases of physical design of high performance PHY design from RTL to delivery of our final GDSII.","responsibilities":"Your ...

Socionext US

Physical Design Engineer

Milpitas, CA · On-site

$195K - $220K/yr

Physical Design Engineer - Socionext America, Milpitas Description Socionext Inc. (SNI) is an innovative enterprise that designs, develops, and delivers System-on-Chip products to customers worldwide.

Altera

Physical Design Engineer

San Jose, CA · On-site

$118K - $169K/yr

About the Role We are seeking a Physical Design Engineer to join our Silicon Design Automation & Implementation organization. In this role, you will contribute to the implementation of custom IP and ...

Ambarella

$140K - $156K/yr

The Physical Design Engineer willbe an integral part of the physical design team with all aspects of physical design implementation and verification tasks for Ambarella's cutting edgelow powerAISoC ...

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Physical Design information

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$95K

$141.5K

How much do physical design jobs pay per year?

As of Sep 2, 2026, the average yearly pay for physical design in the United States is $139,408.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $140,000.00 per year, depending on experience, location, and employer.

What is physical design in the context of electronics and semiconductors?

Physical design refers to the process of transforming a circuit's logical representation into a geometrical layout that can be manufactured on a semiconductor chip. This involves placing and routing the various components, such as transistors and interconnections, while meeting performance, power, and area constraints. Physical design engineers use specialized software tools to optimize the layout and ensure it adheres to manufacturing rules. The process is a critical step in the development of integrated circuits (ICs) and directly impacts the chip’s speed, power consumption, and size.

What are the key skills and qualifications needed to thrive as a physical design engineer, and why are they important?

To thrive as a Physical Design Engineer, you need a solid background in electrical engineering, digital circuit design, and VLSI concepts, usually supported by a relevant degree. Proficiency with EDA tools like Cadence, Synopsys, or Mentor Graphics, as well as familiarity with scripting languages (e.g., TCL, Perl), is essential. Strong problem-solving, attention to detail, and effective communication skills help you address complex design challenges and collaborate within cross-functional teams. These competencies are crucial for optimizing chip layouts, ensuring manufacturability, and meeting performance and timing requirements in semiconductor development.

What are some common challenges faced by physical design engineers in meeting timing closure during chip development?

Physical Design engineers often encounter challenges in achieving timing closure due to factors such as increasing circuit complexity, tight power and area constraints, and process variations. Meeting timing goals requires careful floorplanning, placement, and routing, as well as close collaboration with logic design and verification teams to resolve critical path issues. Engineers must also frequently iterate designs and use advanced EDA tools to optimize performance while balancing trade-offs between speed, power, and manufacturability.

What is the difference between Physical Design vs Logic Design?

AspectPhysical DesignLogic Design
Primary FocusTranslating logical circuits into physical layoutsCreating logical circuit schematics and functional specifications
Skills RequiredEDA tools, layout constraints, circuit optimizationHardware description languages, digital logic, circuit theory
Work EnvironmentASIC/FPGA design teams, semiconductor companiesDesign teams, electronic design automation (EDA) environments
CertificationsTypically none specific, but EDA tool proficiency is valuedHardware description language certifications (e.g., VHDL, Verilog)

Physical Design and Logic Design are closely related stages in chip development. Logic Design focuses on creating the logical circuit functions, while Physical Design involves implementing those functions into physical layouts on silicon. Both roles require knowledge of digital circuits, but Physical Design emphasizes layout optimization and tool proficiency, whereas Logic Design centers on circuit behavior and description.

How to get into physical design?

To enter physical design, candidates typically need a bachelor's degree in electrical engineering, computer engineering, or a related field. Gaining experience with hardware description languages like VHDL or Verilog, and proficiency in EDA tools such as Synopsys or Cadence, is essential. Internships or entry-level positions in chip design can also provide valuable practical experience.

What is the future of physical design?

The future of physical design in chip design involves increased automation through advanced EDA tools, integration of machine learning for optimization, and a focus on power efficiency and performance. As technology nodes shrink, physical design engineers will need to adapt to more complex constraints and tighter schedules, often requiring expertise in scripting and tool customization.
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Cities with the most Physical Design job openings:

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What states have the most Physical Design jobs?

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Physical Design jobs near you
Infographic showing various Physical Design job openings in the United States as of August 2026, with employment types broken down into 1% As Needed, 74% Full Time, 20% Part Time, 1% Temporary, 3% Contract, and 1% Nights. Highlights an 97% Physical, 1% Hybrid, and 2% Remote job distribution, with an average salary of $139,408 per year, or $67 per hour.

Physical Design Engineer

DensityAI

Mountain View, CA • On-site

$160K - $165K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Re-posted 15 days ago

Job description

About the role

Own floorplan-to-signoff physical design for one or more blocks of our AI accelerator silicon. Work with chip-design and software teams driving DensityAI's AI accelerator program from first silicon through scale-out.

What you'll do
  • Own floorplan-to-signoff physical design for one or more blocks of our AI accelerator silicon
  • Use and develop AI-assisted tool flows to accelerate physical design and signoff timelines
What we're looking for
  • Exceptional abilities across the full physical design flow (synthesis, place & route, CTS, signoff)
  • 8+ years of experience on very high performance designs at advanced technology nodes (7nm or better)
  • Hands-on with industry-standard PD tools (Cadence Innovus, Synopsys Fusion Compiler, or equivalent) and signoff (PrimeTime, Tempus, or equivalent)
  • Demonstrated ability to work closely with architects, RTL designers, EDA vendors, and foundries to design and sign off complex chips
  • (Optional) Multi-die packaging (CoWoS, 2.5D / 3D), thermal / IR / EM signoff, signal integrity, or DFT-aware physical design
Compensation

Final offers depend on level, location, and skills relevant to the role. Additional compensation: equity grant per company guidelines; medical / dental / vision; 401(k); standard PTO.

Visa Sponsorship

DensityAI sponsors qualified candidates for H-1B, O-1, TN, E-3, and other employment-based visas, and we welcome applicants on F-1 OPT and STEM-OPT. Work authorization is required at start; we provide immigration support to secure or transfer status.

Export Controls

Aspects of this role may involve access to information subject to U.S. export controls (EAR/ITAR). We may discuss licensing or scope adjustments during the interview.

Equal Opportunity

DensityAI is an Equal Opportunity Employer. We do not discriminate on the basis of race, color, religious creed, national origin, ancestry, physical or mental disability, medical condition, genetic information, marital status, sex, gender, gender identity, gender expression, age (40+), sexual orientation, military or veteran status, pregnancy, or any other status protected by law. We comply with the California CROWN Act and provide reasonable accommodations on request.

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