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Physical Design Jobs (NOW HIRING)

Wipro Limited

Physical Design Engineer

Mountain View, CA · On-site

$100K - $180K/yr

Physical Design Engineer City: Mountain View State/Province: California Posting Start Date: 5/12/26 Wipro Limited (NYSE: WIT, BSE: 507685, NSE: WIPRO) is a leading technology services and consulting ...

Trispark Inc

Physical Design Engineer

Austin, TX

$134.80K - $138.70K/yr

We are looking for a highly skilled Physical Design Engineer to work at block level and/or top level for high-performance ASICs, SoCs, and custom silicon chips with strong scripting skills. The ideal ...

Mirafra Technology

Physical Design Engineer

San Diego, CA · On-site

$144.40K - $148.60K/yr

Job Overview: The Graphics team is looking for Experienced Physical Design Engineers to work on Adreno Graphics cores in the area of Physical Implementation. Responsibilities: The Physical ...

Etched

Physical Design Engineer

San Jose, CA · On-site

$150K - $275K/yr

Job Summary Etched is looking for exceptional Physical Design engineers to join our team. In this role, you will own block-level implementation and verification, drive timing closure and PPA ...

Hudson River Trading

Physical Design Engineer

Austin, TX · On-site

$134.80K - $138.80K/yr

Hudson River Trading (HRT) is seeking a Physical Design Engineer with a broad, versatile skillset to join our growing Hardware team. In this role, you will help deliver performance-critical ASICs and ...

Talent 101, Inc.

Physical Design Engineer

Frisco, TX · On-site

$127.30K - $131K/yr

Lead end to end Physical Design from floorplan to GDS * Own full PnR flow: placement, CTS, routing, optimization, ECOs * Run, debug, and close DRC/LVS for foundry clean signoff * Drive timing closure ...

Nvidia

Physical Design Engineer

Westford, MA · On-site

$141.40K - $145.50K/yr

NVIDIA is looking for best-in-class Senior Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices ...

CivicMinds, Inc.

Physical Design Engineer

San Diego, CA · On-site

$145.90K - $150.20K/yr

Physical design engineers are ideally creative, motivated, energetic, pleasant to work with, and put the needs of the team first. These candidates will be responsible for designs and test structures ...

Etched

Physical Design Engineer

San Jose, CA · On-site

$150K - $275K/yr

Job Summary Etched is looking for exceptional Physical Design engineers to join our team. In this role, you will own block-level implementation and verification, drive timing closure and PPA ...

Nvidia Corporation

Physical Design Engineer

Westford, MA · On-site

$141.40K - $145.50K/yr

NVIDIA is looking for best-in-class Senior Physical Design Engineers to join our outstanding Networking Silicon engineering team, developing the industry's best high speed communication devices ...

Wipro Limited

Physical Design Engineer

Sunnyvale, TX · On-site

$60K - $148.50K/yr

Physical Design Engineer City: Sunnyvale State/Province: California Posting Start Date: 5/28/26 Wipro Limited (NYSE: WIT, BSE: 507685, NSE: WIPRO) is a leading technology services and consulting ...

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Mirafra Technology

Physical Design Engineer

San Diego, CA · On-site

$144.40K - $148.60K/yr

Physical Design Engineer Location : San Diego,CA Type : Full Time Job Overview: To do Floor planning, P&R, timing closure SI prevention/fixing, power planning, CTS, PV and I/R drop for Block as well ...

Cerebras Systems

3D Physical Design Engineer

Sunnyvale, CA · On-site

$150K - $270K/yr

About The Role As a member of our tight knit physical design team, you will be working on the design and analysis of 3D integrated products. This role involves a combination of traditional ASIC/SoC ...

Broadcom, Inc.

Physical Design Engineer

San Jose, CA · On-site

$120K - $192K/yr

Resolve physical design issues related to chip integration and assembly * Manage all cross functional interactions related to top level floorplanning, I/O and bump planning with package team

Broadcom, Inc.

Physical Design Engineer

San Jose, CA · On-site

$141.30K - $226K/yr

Resolve physical design issues related to chip integration and assembly * Manage all cross functional interactions related to top level floorplanning, I/O and bump planning with package team

Eridu AI

Physical Design Engineer

Saratoga, CA · On-site

$210K - $250K/yr

Define the Physical Assembly of SOC. involving all aspects of physical design functions such as P&R, timing, floorplan, clocking, electrical analysis, and power. * Proficiency in Synthesis design ...

Tenstorrent

Physical Design Engineer

Austin, TX · On-site

$100K - $500K/yr

Tenstorrent is seeking a talented Physical Design Engineer to implement high-performance blocks for our industry-leading CPU and AI/ML architectures. You'll own the complete implementation flow from ...

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All JobsPhysical Design Jobs

Physical Design information

See salary details

$95K

$141.5K

How much do physical design jobs pay per year?

As of Jun 2, 2026, the average yearly pay for physical design in the United States is $139,408.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $140,000.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Physical Design Engineer, and why are they important?

To thrive as a Physical Design Engineer, you need a solid background in electrical engineering, digital circuit design, and VLSI concepts, usually supported by a relevant degree. Proficiency with EDA tools like Cadence, Synopsys, or Mentor Graphics, as well as familiarity with scripting languages (e.g., TCL, Perl), is essential. Strong problem-solving, attention to detail, and effective communication skills help you address complex design challenges and collaborate within cross-functional teams. These competencies are crucial for optimizing chip layouts, ensuring manufacturability, and meeting performance and timing requirements in semiconductor development.

What are some common challenges faced by Physical Design engineers in meeting timing closure during chip development?

Physical Design engineers often encounter challenges in achieving timing closure due to factors such as increasing circuit complexity, tight power and area constraints, and process variations. Meeting timing goals requires careful floorplanning, placement, and routing, as well as close collaboration with logic design and verification teams to resolve critical path issues. Engineers must also frequently iterate designs and use advanced EDA tools to optimize performance while balancing trade-offs between speed, power, and manufacturability.

What is physical design in the context of electronics and semiconductors?

Physical design refers to the process of transforming a circuit's logical representation into a geometrical layout that can be manufactured on a semiconductor chip. This involves placing and routing the various components, such as transistors and interconnections, while meeting performance, power, and area constraints. Physical design engineers use specialized software tools to optimize the layout and ensure it adheres to manufacturing rules. The process is a critical step in the development of integrated circuits (ICs) and directly impacts the chip’s speed, power consumption, and size.

What is the difference between Physical Design vs Logic Design?

AspectPhysical DesignLogic Design
Primary FocusTranslating logical circuits into physical layoutsCreating logical circuit schematics and functional specifications
Skills RequiredEDA tools, layout constraints, circuit optimizationHardware description languages, digital logic, circuit theory
Work EnvironmentASIC/FPGA design teams, semiconductor companiesDesign teams, electronic design automation (EDA) environments
CertificationsTypically none specific, but EDA tool proficiency is valuedHardware description language certifications (e.g., VHDL, Verilog)

Physical Design and Logic Design are closely related stages in chip development. Logic Design focuses on creating the logical circuit functions, while Physical Design involves implementing those functions into physical layouts on silicon. Both roles require knowledge of digital circuits, but Physical Design emphasizes layout optimization and tool proficiency, whereas Logic Design centers on circuit behavior and description.

More about Physical Design jobs
What cities are hiring for Physical Design jobs? Cities with the most Physical Design job openings:
What are the most commonly searched types of Physical Design jobs? The most popular types of Physical Design jobs are:
What states have the most Physical Design jobs? States with the most job openings for Physical Design jobs include:
What job categories do people searching Physical Design jobs look for? The top searched job categories for Physical Design jobs are:
Physical Design jobs near you
Infographic showing various Physical Design job openings in the United States as of May 2026, with employment types broken down into 3% As Needed, 81% Full Time, 8% Part Time, and 8% Contract. Highlights an 97% Physical, 1% Hybrid, and 2% Remote job distribution, with an average salary of $139,408 per year, or $67 per hour.

Physical Design Engineer

DensityAI, Inc.

Mountain View, CA

$230K - $420K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Posted 12 days ago

Job description

ITAR Notice: This role involves access to ITAR-controlled information. Applicants must be U.S. persons (U.S. citizens, U.S. permanent residents, asylees, or refugees) per 22 CFR 120.62.

About the role

Own floorplan-to-signoff physical design for one or more blocks of our AI accelerator silicon. Work with chip-design and software teams driving DensityAI's AI accelerator program from first silicon through scale-out.

What you'll do
  • Own floorplan-to-signoff physical design for one or more blocks of our AI accelerator silicon.
  • Use and develop AI-assisted tool flows to accelerate physical design and signoff timelines.
What we're looking for
  • Exceptional abilities across the full physical design flow (synthesis, place route, CTS, signoff)
  • 8+ years of experience on very high performance designs at advanced technology nodes (7nm or better)
  • Hands-on with industry-standard PD tools (Cadence Innovus, Synopsys Fusion Compiler, or equivalent) and signoff (PrimeTime, Tempus, or equivalent)
  • Demonstrated ability to work closely with architects, RTL designers, EDA vendors, and foundries to design and sign off complex chips
  • (Optional) Multi-die packaging (CoWoS, 2.5D / 3D), thermal / IR / EM signoff, signal integrity, or DFT-aware physical design
Compensation

Base salary: $230k – $420k USD per year, depending on experience and qualifications. Final offers depend on level, location, and skills relevant to the role. Additional compensation: equity grant per company guidelines; medical / dental / vision; 401(k); standard PTO. Discussed in detail during the interview.

Visa sponsorship

DensityAI sponsors qualified candidates for H-1B, O-1, TN, E-3, and other employment-based visas, and we welcome applicants on F-1 OPT and STEM-OPT. Work authorization is required at start; we provide immigration support to secure or transfer status.

Export controls

Aspects of this role may involve access to information subject to U.S. export controls (EAR/ITAR). We may discuss licensing or scope adjustments during the interview.

Equal Opportunity

DensityAI is an Equal Opportunity Employer. We do not discriminate on the basis of race, color, religious creed, national origin, ancestry, physical or mental disability, medical condition, genetic information, marital status, sex, gender, gender identity, gender expression, age (40+), sexual orientation, military or veteran status, pregnancy, or any other status protected by law. We comply with the California CROWN Act and provide reasonable accommodations on request.