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No Experience Entry Level Asic Design Engineer Jobs

Debugging tests with design engineers to deliver functionally correct design blocks * Closing coverage measures to identify verification holes and to show progress towards tape-out Tools: * VCS, URG ...

If you want this position to be yours, we would like you to have the following knowledge/experience ... No dress code! Be comfortable at work * Are you coming from another country? We offer you a ...

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No Experience Entry Level Asic Design Engineer information

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$40.5K

$88.2K

$158.5K

How much do no experience entry level asic design engineer jobs pay per year?

As of Jun 15, 2026, the average yearly pay for no experience entry level asic design engineer in the United States is $88,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $68,000.00 and $98,500.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a No Experience Entry Level ASIC Design Engineer, and why are they important?

To thrive as a No Experience Entry Level ASIC Design Engineer, you need a solid understanding of digital logic design, circuit fundamentals, and a relevant engineering degree (such as Electrical or Computer Engineering). Familiarity with hardware description languages like Verilog or VHDL, as well as simulation and design tools such as Synopsys or Cadence, is typically expected. Strong analytical thinking, attention to detail, and effective teamwork and communication skills help you learn quickly and contribute to complex projects. These skills and qualities are crucial for ensuring the accuracy, efficiency, and reliability of ASIC designs in collaborative engineering environments.

What is a No Experience Entry Level ASIC Design Engineer?

A No Experience Entry Level ASIC Design Engineer is a recent graduate or someone transitioning into the field of ASIC (Application-Specific Integrated Circuit) design with little to no prior professional experience. These engineers typically assist senior team members in designing, testing, and verifying custom integrated circuits used in electronics. Their responsibilities often include learning industry-standard design tools, understanding basic digital and analog circuit concepts, and supporting various stages of the ASIC development process while gaining hands-on experience.

What types of projects and training can a No Experience Entry Level ASIC Design Engineer expect in their first year?

As a No Experience Entry Level ASIC Design Engineer, you can expect to start with comprehensive onboarding and training sessions covering digital design fundamentals, ASIC design flows, and relevant Electronic Design Automation (EDA) tools. Early projects are typically focused on assisting senior engineers with tasks such as module-level design, verification, and documentation under close supervision. You’ll often work as part of a collaborative team, participating in code reviews and weekly design meetings, which helps build both technical and communication skills. Many companies also offer mentorship programs to support your professional growth and provide feedback as you advance.
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Infographic showing various No Experience Entry Level Asic Design Engineer job openings in the United States as of June 2026, with employment types broken down into 2% As Needed, 68% Part Time, and 30% Contract. Highlights an 87% Physical, 5% Hybrid, and 8% Remote job distribution, with an average salary of $88,150 per year, or $42.4 per hour.
FPGA/ASIC Design Engineer (Silicon Engineering)

FPGA/ASIC Design Engineer (Silicon Engineering)

SpaceX

Redmond, WA • On-site

$140K - $175K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted 25 days ago


SpaceX rating

8.7

Company rating: 8.7 out of 10

Based on 144 frontline employees who took The Breakroom Quiz

13th of 60 rated aerospace companies


Job description

SpaceX was founded under the belief that a future where humanity is out exploring the stars is fundamentally more exciting than one where we are not. Today SpaceX is actively developing the technologies to make this possible, with the ultimate goal of enabling human life on Mars.
FPGA/ASIC DESIGN ENGINEER (SILICON ENGINEERING)
At SpaceX we're leveraging our experience in building rockets and spacecraft to deploy Starlink, the world's most advanced broadband internet system. Starlink is the world's largest satellite constellation and is providing fast, reliable internet to millions of users worldwide. We design, build, test, and operate all parts of the system - thousands of satellites, consumer receivers that allow users to connect within minutes of unboxing, and the software that brings it all together. We've only begun to scratch the surface of Starlink's potential global impact and are looking for best-in-class engineers to help maximize Starlink's utility for communities and businesses around the globe.
We are seeking a motivated, proactive, and intellectually curious engineer who will work alongside world-class cross-disciplinary teams (systems, firmware, architecture, design, validation, product engineering, ASIC implementation). In this role, you will be developing cutting-edge next-generation FPGAs and ASICs for deployment in space and ground infrastructures around the globe. These chips are enabling connectivity in places it has previously not been available, affordable or reliable. Your efforts will help deliver cutting-edge solutions that will expand the performance and capabilities of the Starlink network.
RESPONSIBILITIES:
  • Design ASICs and/or FPGAs for Starlink projects, implementing complex SoC blocks and SoC integration tasks using Verilog/SystemVerilog
  • Optimize designs for power, performance and area
  • Participate in the full ASIC/FPGA design lifecycle for Starlink projects, from high-level conceptual and architectural discussions through microarchitecture, design partitioning, and collaboration with backend/implementation teams, and assist in lab bring-up and validation
  • Contribute to continual improvements to our designs by building physical and digital tools to analyze data collected on orbit and in the lab
  • Engage in high-level architectural design for test systems to support FPGA/ASIC validation, generational interoperability, and integration with DSP/communications subsystems for comprehensive lab and on-orbit verification.
  • Collaborate with software engineers in developing production software for your designs

BASIC QUALIFICATIONS:
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or Physics
  • 1+ years of experience in RTL Design using SystemVerilog, Verilog or VHDL

PREFERRED SKILLS AND EXPERIENCE:
  • ASIC/FPGA system integration experience
  • Proficiency in Python, C/C++, and Bash
  • Experience in designing DSP, digital communication system datapath blocks, and/or modem design
  • Experience with EDA tools such as HDL simulators (e.g. VCS, Questa, IES), HDL Lint tools (e.g. Spyglass), FPGA tools (e.g. Xilinx Vivado, Altera Quartus II)
  • Experience and understanding of AXI/AHB/APB protocols
  • Strong foundation in electrical engineering fundamentals
  • Experience debugging complex PCBs containing Microprocessors and FPGAs in the lab using equipment such as oscilloscopes and spectrum analyzers
  • Ability to work in a dynamic environment with changing needs and requirements
  • Team-player, can-do attitude and ability to work well in a group environment while still contributing on an individual basis
  • Demonstrated ability to work in a highly cross-functional role
  • Enjoys being challenged and learning new skills
  • Master's in Electrical/Computer Engineering or related field

ADDITIONAL REQUIREMENTS:
  • Ability to work extended hours or weekends as needed for mission critical deadlines

COMPENSATION & BENEFITS:
Pay range:
ASIC Design Engineer/Level I: $125,000.00 - $145,000.00/per year
ASIC Design Engineer/Level II: $140,000.00 - $175,000.00/per year
Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.
Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock, stock options, or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short & long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation & will be eligible for 10 or more paid holidays per year. Exempt employees are eligible for 5 days of sick leave per year.
ITAR REQUIREMENTS:
  • To conform to U.S. Government export regulations, applicant must be a (i) U.S. citizen or national, (ii) U.S. lawful, permanent resident (aka green card holder), (iii) Refugee under 8 U.S.C. § 1157, or (iv) Asylee under 8 U.S.C. § 1158, or be eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.

SpaceX is an Equal Opportunity Employer; employment with SpaceX is governed on the basis of merit, competence and qualifications and will not be influenced in any manner by race, color, religion, gender, national origin/ethnicity, veteran status, disability status, age, sexual orientation, gender identity, marital status, mental or physical disability or any other legally protected status.
Applicants wishing to view a copy of SpaceX's Affirmative Action Plan for veterans and individuals with disabilities, or applicants requiring reasonable accommodation to the application/interview process should reach out to EEOCompliance@spacex.com.

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