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Manager Memory Design Engineer Jobs (NOW HIRING)

Broadcom

Staff Memory Circuit Design Engineer

Irvine, CA · On-site

$108K - $172K/yr

Staff Memory Circuit Design Engineer We are looking for energetic and passionate memory design engineers to join our Central Engineering Group and be part of an elite memory team responsible for the ...

Intel

Memory Circuit Design Engineer

Austin, TX · On-site

$190K - $269K/yr

The CPU Circuit Technology team is looking for a highly motivated and experienced individual to join our team as a Memory Circuit Design Engineer. In this role, you will be responsible for designing ...

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Manager Memory Design Engineer information

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How much do manager memory design engineer jobs pay per year?

As of Aug 22, 2026, the average yearly pay for manager memory design engineer in the United States is $134,466.00, according to ZipRecruiter salary data. Most workers in this role earn between $109,000.00 and $150,000.00 per year, depending on experience, location, and employer.

What does a manager memory design engineer do?

A Manager Memory Design Engineer oversees the development and design of memory components, such as DRAM, SRAM, and Flash, used in electronic devices. They lead a team of engineers, coordinate project timelines, and ensure the memory architecture meets performance, power, and reliability specifications. Their responsibilities also include collaborating with cross-functional teams, mentoring junior engineers, and staying updated with the latest advancements in memory technology. This role combines technical expertise in memory circuit design with leadership and project management skills.

What are the key skills and qualifications needed to thrive as a manager memory design engineer?

To thrive as a Manager Memory Design Engineer, you need a strong background in electrical engineering, experience with memory architecture, and expertise in circuit design, often supported by a relevant degree and years of industry experience. Familiarity with EDA tools like Cadence or Synopsys, and knowledge of industry standards such as DDR or SRAM/DRAM protocols, are typically required. Leadership, effective communication, and project management skills help you guide teams and collaborate across departments. These skills are crucial for delivering innovative, high-performance memory solutions on time and ensuring team and project success.

What are some common challenges faced by a manager memory design engineer and how can they be addressed?

Manager Memory Design Engineers often face challenges in balancing project timelines with the technical complexity of designing high-performance memory circuits. Coordinating cross-functional teams, such as layout, verification, and product engineering, can also be demanding, especially when requirements change or unexpected technical issues arise. Effective communication, proactive risk management, and fostering a collaborative team environment are key strategies for overcoming these obstacles. Staying updated with the latest memory technology trends and design tools also helps in anticipating and mitigating potential project bottlenecks.

What cities are hiring for Manager Memory Design Engineer jobs?

Cities with the most Manager Memory Design Engineer job openings:

What are the most commonly searched types of Memory Design Engineer jobs?

The most popular types of Memory Design Engineer jobs are:

What states have the most Manager Memory Design Engineer jobs?

States with the most job openings for Manager Memory Design Engineer jobs include:

Manager Memory Design Engineer jobs near you

Staff Memory Circuit Design Engineer

Broadcom Inc.

Irvine, CA • On-site

$108 - $172.80/hr

Other

Medical, Dental, Vision, Retirement, PTO

Re-posted 17 days ago

Broadcom rating

8.7

Company rating: 8.7 out of 10

Based on 23 frontline employees who took The Breakroom Quiz

19th of 159 rated electronics manufacturers

Job description

Staff Memory Circuit Design Engineer

We are looking for energetic and passionate memory design engineers to join our Central Engineering Group and be part of an elite memory team responsible for the development of memory compilers and custom macros of all types on the bleeding edge of process technology.


Responsibilities

  • Analyze different memory architectures and highlight the tradeoffs

  • Design and build memory or circuit blocks at the gate or transistor level

  • Simulate and analyze the circuit design using transistor level simulators

  • Extract the layout and perform post-layout simulations and verification

  • Floorplan physical implementation and leafcell layout integration to build the physical macro

  • Integrate characterization flow to extract timing and power information

  • Develop scripts to automate characterization flow, simulations, and verification

  • Specify and verify various behavioral and physical memory models

  • Document the design specifications, behavioral description, and timing diagrams

  • Specify silicon test plan and correlate silicon to simulation data

  • Help debug silicon issues


Skillset Required

  • Knowledge in development of memory compilers or custom digital circuits of all types; SRAMs, Register-files, Multi-ports, ROM, etc.

  • Good understanding of transistor level circuit behavior and device physics

  • Good understanding of signal integrity, EM/IR, and reliability analysis

  • Understanding of memory behavioral and physical models

  • Understanding of DFT schemes and chip level integration

  • Familiarity with test setups, silicon testing and debug is a plus

  • Proficient in running simulators, writing automation scripts, and are tools savvy

  • Good proficiency in Python scripting language is a strong positive

  • Good communication, interpersonal, and leadership skills

  • Motivated, self-driven and good at multi-tasking


Qualifications

Requires a BS in Electrical Engineering and 8+ years of related experience or MS in Electrical Engineering and 6+ years of related experience or PhD in Electrical Engineering and 3+ years of related experience.


Compensation and Benefits

The annual base salary range for this position is $108,000 - $172,800. This position is also eligible for a discretionary annual bonus in accordance with relevant plan documents, and equity in accordance with equity plan documents and equity award agreements. Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.


Equal Opportunity Statement

Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.

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