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Manager Digital Verification Engineer Jobs (NOW HIRING)

Olix Computing

Digital Verification Manager

Austin, TX · On-site

$388K/yr

The Role We're searching for an ASIC Digital Verification Manager to lead and deliver functional ... As both a leader and technical authority, you will mentor engineers, set a high bar for ...

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Manager Digital Verification Engineer information

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$105.5K

$149.2K

$167K

How much do manager digital verification engineer jobs pay per year?

As of Jun 27, 2026, the average yearly pay for manager digital verification engineer in the United States is $149,150.00, according to ZipRecruiter salary data. Most workers in this role earn between $136,000.00 and $166,000.00 per year, depending on experience, location, and employer.

What is the difference between Manager Digital Verification Engineer vs Digital Verification Engineer?

AspectManager Digital Verification EngineerDigital Verification Engineer
CredentialsBachelor's/Master's in Electrical Engineering, VLSI, or related; often with leadership experienceBachelor's/Master's in Electrical Engineering, VLSI, or related; no managerial experience required
Work EnvironmentLeads verification teams, manages projects, coordinates with design teamsPerforms verification tasks, runs simulations, develops testbenches
Industry UsageCommon in semiconductor, electronics, and chip design companiesWidely used in similar industries for verification roles

The main difference is that a Manager Digital Verification Engineer oversees verification teams and projects, focusing on leadership and coordination, while a Digital Verification Engineer primarily executes verification tasks and develops test environments. The managerial role involves more strategic planning, resource management, and team leadership, whereas the verification engineer role is more technical and hands-on.

What does a Manager Digital Verification Engineer do?

A Manager Digital Verification Engineer leads a team responsible for verifying the functionality and performance of digital hardware designs, ensuring they meet specifications before production. This role involves overseeing the development and execution of verification plans using simulation, emulation, and formal verification tools. The manager coordinates with design, validation, and project management teams to deliver high-quality, bug-free silicon products on schedule. They also mentor engineers, optimize verification methodologies, and maintain project documentation.

What are the key skills and qualifications needed to thrive as a Manager Digital Verification Engineer, and why are they important?

To thrive as a Manager Digital Verification Engineer, you need a deep understanding of digital design verification, expertise in SystemVerilog or UVM methodologies, and a relevant engineering degree. Familiarity with industry-standard EDA tools like Synopsys VCS, Cadence Xcelium, and scripting languages such as Python or Perl is critical, along with experience in project management. Strong leadership, communication, and problem-solving abilities help you effectively guide teams and collaborate across departments. These skills ensure efficient, high-quality verification processes, timely project delivery, and successful team performance in complex semiconductor development environments.

How does a Manager Digital Verification Engineer typically balance hands-on technical verification work with team leadership responsibilities?

A Manager Digital Verification Engineer often splits their time between overseeing the technical direction of verification projects and managing a team of engineers. While they remain involved in high-level planning, reviewing verification strategies, and resolving complex technical issues, they also focus on mentoring team members, conducting performance reviews, and aligning resources to project timelines. The role requires strong organizational skills to ensure project milestones are met without sacrificing team development or quality. Regular collaboration with design, validation, and project management teams is essential to ensure seamless integration and product delivery.
What cities are hiring for Manager Digital Verification Engineer jobs? Cities with the most Manager Digital Verification Engineer job openings:
What are the most commonly searched types of Digital Verification Engineer jobs? The most popular types of Digital Verification Engineer jobs are:
What states have the most Manager Digital Verification Engineer jobs? States with the most job openings for Manager Digital Verification Engineer jobs include:
Manager Digital Verification Engineer jobs near you
Infographic showing various Manager Digital Verification Engineer job openings in the United States as of June 2026, with employment types broken down into 67% Full Time, 30% Part Time, and 3% Contract. Highlights an 92% Physical, 2% Hybrid, and 6% Remote job distribution, with an average salary of $149,150 per year, or $71.7 per hour.

Digital Verification Manager

Olix Computing

Austin, TX • On-site

$388K/yr

Full-time

Retirement

Posted 9 days ago

Job description

About OLIX
AI is growing faster than any technology in history and the explosion in demand has created a massive infrastructure gap; we can no longer build chips or power stations fast enough to keep up. The industry is still leaning on a ten-year-old hardware blueprint that has reached its limit. A new paradigm that is faster and more efficient will be the biggest economic opportunity of the next century and create the most important company of the next decade. The OLIX Decode Accelerator 1 (DX-1) is the first accelerator architected specifically for decode. Rack-scale co-design of logic, data movement, packaging, optics and interconnect enables a step change in system level performance.
The Role
We're searching for an ASIC Digital Verification Manager to lead and deliver functional verification of the digital subsystems of our next-generation high-speed mixed-signal ASICs. This is a hands-on leadership role with a strong focus on execution speed, first-silicon success, people management, and cross-functional alignment. You will drive your team to verify complex digital systems that integrate high-bandwidth interfaces, deterministic control loops, and advanced mixed-signal blocks, on schedule, on budget, and with uncompromising quality. As both a leader and technical authority, you will mentor engineers, set a high bar for verification rigor, and ensure the program executes with precision from specification through tape-out sign-off, silicon bring-up, and mass production.
This is a rare opportunity to own end-to-end verification leadership on next-generation high-speed mixed-signal ASICs, from architecture through first silicon to mass production, with real authority over strategy, talent, and technical direction. If you thrive at the intersection of rigorous verification discipline and high-stakes execution speed, this role puts you at the center of the most challenging and consequential problems in modern ASIC development.
Responsibilities
  • Execution Ownership & Speed - Lead end-to-end verification of digital subsystems (testbench architecture, UVM development, functional and code coverage closure, formal verification, CDC/RDC sign-off, low-power verification, gate-level simulation, and emulation/FPGA prototyping), ensuring aggressive schedule targets are met without compromising quality.
  • Right-First-Time Delivery - Define and enforce verification plans, sign-off criteria, and silicon-correlation strategies that catch bugs pre-silicon and drive first-silicon success.
  • Line & Performance Management - Manage, mentor, and grow a high-performing, multi-site team of 6-12 verification engineers. Own goal-setting, performance reviews, career development, and hiring across sites, while fostering a culture of accountability, collaboration, and continuous improvement that holds up across time zones.
  • Cross-Functional Alignment - Drive seamless collaboration with design, architecture, analog, DFT, firmware, post-silicon validation, and test teams to keep programs moving fast and aligned from spec → vplan → implementation → sign-off → bring-up.
  • Program Leadership - Define and track aggressive verification schedules, compute and license resource plans, and risk-mitigation strategies. Communicate progress, coverage status, trade-offs, and escalation paths clearly to executives and customers.
  • Technical Direction - Provide architectural guidance for verification environments targeting high-speed digital subsystems, including multi-lane data paths, clocking and reset schemes, and mixed-signal control loops (real-number modeling and AMS co-simulation).
  • Culture of Speed & Quality - Champion verification automation, reusable UVM components, regression and triage infrastructure, streamlined methodologies, and knowledge sharing to deliver high-quality silicon on tight timelines.

Skills & Experience
  • 10+ years of digital ASIC verification, with at least 3 full product cycles successfully executed from specification to high-volume production.
  • Proven track record of driving on-time, first-silicon success on complex, high-performance ASICs with mixed-signal interfaces (e.g., SerDes, DACs/ADCs, RF SoCs, display/camera pipelines).
  • Strong expertise in SystemVerilog/UVM, constrained-random verification, functional coverage, SVA assertions, formal property verification, CDC/RDC sign-off, low-power verification (UPF/CPF), gate-level simulation, and emulation/FPGA prototyping.
  • Understanding of mixed-signal verification and ability to partner effectively with analog and design teams on specification splits and verification ownership.
  • Demonstrated success in line management and performance management, including hiring, mentoring, and building high-performing verification teams.
  • Skilled in fast-paced, cross-functional program leadership with a proven ability to manage schedules, risks, and EDA vendor/tool relationships.
  • Outstanding written and verbal communication; confident presenting clear, concise verification status, coverage data, and risk assessments to executives, customers, and cross-site teams.
Compensation & Equity:
  • Competitive Salary: Commensurate with your experience, skills, and location
  • Equity & Ownership: Meaningful stock options. You're not just joining the mission; you're owning a piece of it
  • Proximity Bonus: We value your time. To minimise your commute and maximise your life, we offer an annual Living-Local Bonus if your residence is within 20 minutes of the office
  • Retirement Benefits:Employer-contributed retirement plans to help you build long-term financial security.

Due to U.S. export control regulations, candidates' eligibility to work at OLIX depends on their most recent citizenship or permanent residency status. We are generally unable to consider applicants whose most recent citizenship or permanent residence is in certain restricted countries (currently including Iran, North Korea, Syria, Cuba, Russia, Belarus, China, Hong Kong, Macau, and Venezuela). Applicants who have subsequently obtained citizenship or permanent residency in another country not subject to these restrictions may still be eligible.

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