Collateral Design and DFM Engineer
$128K - $153K/yr
Experience in scribe line layout design and process monitoring structure development * Proven track record in foundry environment developing and implementing DFM solutions for varied customer ...
$128K - $153K/yr
Experience in scribe line layout design and process monitoring structure development * Proven track record in foundry environment developing and implementing DFM solutions for varied customer ...
$128K - $153K/yr
Experience in scribe line layout design and process monitoring structure development * Proven track record in foundry environment developing and implementing DFM solutions for varied customer ...
Memory bit-cell and complex periphery IC layout and automation. * Memory array/IP design, memory circuit innovation, test-chip design. * Pre-Si verification, post-Si validation and debugging to ...
Memory bit-cell and complex periphery IC layout and automation. * Memory array/IP design, memory circuit innovation, test-chip design. * Pre-Si verification, post-Si validation and debugging to ...
Tucson, AZ · On-site
Texas Instruments is seeking an experienced Layout Designer to join our team! Responsibilities ... Work is completed through use of CAD software, interpreting constraints and providing back ...
Tucson, AZ · On-site
Texas Instruments is seeking an experienced Layout Designer to join our team! Responsibilities ... Work is completed through use of CAD software, interpreting constraints and providing back ...
Tucson, AZ · On-site
Texas Instruments is seeking an experienced Layout Designer to join our team! Responsibilities ... Work is completed through use of CAD software, interpreting constraints and providing back ...
Tucson, AZ · On-site
Texas Instruments is seeking an experienced Layout Designer to join our team! Responsibilities ... Work is completed through use of CAD software, interpreting constraints and providing back ...
Tucson, AZ · On-site
Texas Instruments is seeking an experienced Layout Designer to join our team! Responsibilities ... Work is completed through use of CAD software, interpreting constraints and providing back ...
Tucson, AZ · On-site
Texas Instruments is seeking an experienced Layout Designer to join our team! Responsibilities ... Work is completed through use of CAD software, interpreting constraints and providing back ...
Texas Instruments is seeking an experienced Layout Designer to join our team! Responsibilities ... Work is completed through use of CAD software, interpreting constraints and providing back ...
Texas Instruments is seeking an experienced Layout Designer to join our team! Responsibilities ... Work is completed through use of CAD software, interpreting constraints and providing back ...
Texas Instruments is seeking an experienced Layout Designer to join our team! Responsibilities ... Work is completed through use of CAD software, interpreting constraints and providing back ...
Texas Instruments is seeking an experienced Layout Designer to join our team! Responsibilities ... Work is completed through use of CAD software, interpreting constraints and providing back ...
Phoenix, AZ · On-site
$70K - $115K/yr
You'll provide support with layout, design, improvement, and implementation that enables our sites to achieve peak performance. You'll champion Continuous Improvement initiatives and projects for the ...
Phoenix, AZ · On-site
$70K - $115K/yr
You'll provide support with layout, design, improvement, and implementation that enables our sites to achieve peak performance. You'll champion Continuous Improvement initiatives and projects for the ...
Phoenix, AZ · On-site
$70K - $115K/yr
You'll provide support with layout, design, improvement, and implementation that enables our sites to achieve peak performance. You'll champion Continuous Improvement initiatives and projects for the ...
Phoenix, AZ · On-site
$70K - $115K/yr
You'll provide support with layout, design, improvement, and implementation that enables our sites to achieve peak performance. You'll champion Continuous Improvement initiatives and projects for the ...
$200K/yr
Collaborate with architecture and layout teams to design circuits that maximize functionality, robustness, and electrical capabilities. * Conduct tape-out activities for analog and mixed-signal ...
$200K/yr
Collaborate with architecture and layout teams to design circuits that maximize functionality, robustness, and electrical capabilities. * Conduct tape-out activities for analog and mixed-signal ...
Short Description Bowman has an opportunity for a Layout Designer II to join our team in Phoenix ... This role supports design development of heavy industrial mining facilities in all facets while ...
Short Description Bowman has an opportunity for a Layout Designer II to join our team in Phoenix ... This role supports design development of heavy industrial mining facilities in all facets while ...
Tucson, AZ · On-site
Short Description Bowman has an opportunity for a Layout Designer II to join our team in Phoenix ... This role supports design development of heavy industrial mining facilities in all facets while ...
Tucson, AZ · On-site
Short Description Bowman has an opportunity for a Layout Designer II to join our team in Phoenix ... This role supports design development of heavy industrial mining facilities in all facets while ...
$97K - $134K/yr
You will contribute directly to the design, layout, and optimization of rugged, highdensity microelectronics that operate in the harshest environments with exceptional reliability. This role serves ...
$97K - $134K/yr
You will contribute directly to the design, layout, and optimization of rugged, highdensity microelectronics that operate in the harshest environments with exceptional reliability. This role serves ...
$97K - $134K/yr
You will contribute directly to the design, layout, and optimization of rugged, highdensity microelectronics that operate in the harshest environments with exceptional reliability. This role serves ...
$97K - $134K/yr
You will contribute directly to the design, layout, and optimization of rugged, highdensity microelectronics that operate in the harshest environments with exceptional reliability. This role serves ...
Phoenix, AZ · On-site
$97K - $134K/yr
You will contribute directly to the design, layout, and optimization of rugged, high-density microelectronics that operate in the harshest environments with exceptional reliability. This role serves ...
Phoenix, AZ · On-site
$97K - $134K/yr
You will contribute directly to the design, layout, and optimization of rugged, high-density microelectronics that operate in the harshest environments with exceptional reliability. This role serves ...
Tempe, AZ · On-site
$164K - $246K/yr
Experience with PCB layout tools and high-speed layout design rules * Knowledge of thermal and mechanical design constraints for space hardware * Familiarity with radiation effects on electronics ...
Tempe, AZ · On-site
$164K - $246K/yr
Experience with PCB layout tools and high-speed layout design rules * Knowledge of thermal and mechanical design constraints for space hardware * Familiarity with radiation effects on electronics ...
This role is responsible for PCB layout, schematic capture, component placement, routing, design documentation, and manufacturing release support for rigid, flex, and rigid-flex board designs. Key ...
This role is responsible for PCB layout, schematic capture, component placement, routing, design documentation, and manufacturing release support for rigid, flex, and rigid-flex board designs. Key ...
Tucson, AZ · On-site
This role is responsible for PCB layout, schematic capture, component placement, routing, design documentation, and manufacturing release support for rigid, flex, and rigid-flex board designs. Key ...
Tucson, AZ · On-site
This role is responsible for PCB layout, schematic capture, component placement, routing, design documentation, and manufacturing release support for rigid, flex, and rigid-flex board designs. Key ...
Expert in substrate design rules Client is seeking an experienced Principal PCB & Substrate Layout Engineer. We leverage our longstanding strategic partnerships to access the latest in commercial ...
Expert in substrate design rules Client is seeking an experienced Principal PCB & Substrate Layout Engineer. We leverage our longstanding strategic partnerships to access the latest in commercial ...
Phoenix, AZ · On-site
$110 - $115/hr
Responsibilities: • Driving design, layout, and analysis of complicated electrical and mechanical systems and their constituent parts including: high-density interposers, substrates, and printed ...
Phoenix, AZ · On-site
$110 - $115/hr
Responsibilities: • Driving design, layout, and analysis of complicated electrical and mechanical systems and their constituent parts including: high-density interposers, substrates, and printed ...
$15.65 is the 25th percentile. Wages below this are outliers.
$9.41 - $17.11
31% of jobs
$17.11 - $24.80
16% of jobs
The median wage is $27.11 / hr.
$24.80 - $32.50
11% of jobs
$32.50 - $40.20
15% of jobs
$45.01 is the 75th percentile. Wages above this are outliers.
$40.20 - $47.90
4% of jobs
$47.90 - $55.60
6% of jobs
$55.60 - $63.29
5% of jobs
$63.29 - $70.99
3% of jobs
$70.99 - $78.69
2% of jobs
$78.69 - $86.39
3% of jobs
$86.39 - $94.08
3% of jobs
$9
$38
$94
| Aspect | Layout Design | Graphic Design |
|---|---|---|
| Primary Focus | Arranging visual elements within a space or page | Creating visual content to communicate messages |
| Skills & Tools | Knowledge of typography, grid systems, software like Adobe InDesign | Creativity, color theory, software like Adobe Photoshop and Illustrator |
| Work Environment | Publishing, print media, web design | Advertising, branding, digital media |
| Credentials | Design degrees, certifications in layout or publishing | Design degrees, portfolio showcasing visual work |
While both roles involve visual creativity, Layout Design primarily focuses on organizing visual elements within a page or space to ensure clarity and flow, often in publishing or web design. Graphic Design, on the other hand, emphasizes creating compelling visual content to communicate messages across various media. Understanding these differences helps in choosing the right career path or job focus.

$128K - $153K/yr
Full-time
Medical, Retirement, PTO
Posted 25 days ago
Lead cross functional teams to define and enhance Design for Manufacturability rules for improved yield, performance, and ramp on advanced logic technologies.
Enhance and communicate silicon learning and yield issues to design teams to update layout and DTCO methodologies and flows.
Work on and refine yield tools and flows to support inline yield detection and optimization.
8.7
Based on 144 frontline employees who took The Breakroom Quiz
10th of 139 rated electronics manufacturers
About MDCEManufacturing Development and Customer Engineering (MDCE) is Intel's newest organization within Intel Foundry Technology Manufacturing (FTM). We bridge the critical gap between Technology Development (TD) and High-Volume Manufacturing (HVM), advancing technology nodes from initial product qualification to high-yield production across multiple products while enhancing technologies for our foundry customers. MDCE is also chartered to develop new technologies on mature node infrastructure to bring new solutions to new customers at reliable yield and performance and low cost, and this is where you are going to play a role.
Position OverviewAs a Collateral - Design and DFM Lead Engineer you will be at the heart of HVM and ramp of leading-edge advance logic technologies chartered with inventing and enhancing DFM methodologies for improving performance, yield and ramp across a diverse product portfolio.
Key Responsibilities
Lead cross functional teams across process integration/ device/ yield/ design/OPC/RET/DR and DTP/CAD teams to define and enhance Design for Manufacturability rules for enhanced yield /performance and faster ramp on advanced logic technologies
Enhance and feed silicon learning / sighting of yield issues for design teams to update layout /DTCO methodologies, flows to capture yield issues early in the design process
Work and refine yield tools/flows inside foundry and help in inline yield detection and optimization
Define/Refine DFM methodologies by understanding silicon process flows and predicting and developing rules for avoiding layout and design marginalities by working with cross functional teams
Ideally the candidate should demonstrate:
Excellent communication and collaboration skills with ability to interface effectively with design teams, process engineers, and external customers from diverse industry segments
Minimum Qualifications
Preferred Qualifications
We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $190,650.00-269,150.00 USDThe range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.*
ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.Sourced by ZipRecruiter
Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth
Manufacturing
10,000+ Employees
Santa Clara, CA, US
1968