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Junior Rtl Design Engineer Jobs in Colorado (NOW HIRING)

Lockheed Martin

FPGA Design Eng

Boulder, CO

$129.50K - $178.40K/yr

Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on ... RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform. Applicants ...

Lockheed Martin Corporation

FPGA Design Eng

Boulder, CO · On-site

$129.50K - $178.40K/yr

Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on ... RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform. Applicants ...

Lockheed Martin

FPGA Design Eng Sr

Boulder, CO

$129.50K - $178.40K/yr

Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on ... RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform. Applicants ...

Lockheed Martin Corporation

FPGA Design Eng Sr

Boulder, CO

$129.50K - $178.40K/yr

Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on ... RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform. Applicants ...

Intel

SoC Logic Design Engineer

Fort Collins, CO · On-site

$141.91K - $269.10K/yr

Develops the logic design, register transfer level (RTL) coding, and simulation for an SoC design ... Intel's Data Center Group is looking for a highly motivated logic designer engineer to join a ...

SEAKR Engineering

Senior FPGA Engineer

Englewood, CO

FPGA design experience including thorough design documentation, completion and review of RTL blocks ... junior engineers. * Clear written and verbal communication skills are required. * A Bachelor ...

SEAKR Engineering

Senior FPGA Engineer

Englewood, CO · On-site

$130K - $185K/yr

FPGA design experience including thorough design documentation, completion and review of RTL blocks ... junior engineers. * Clear written and verbal communication skills are required. * A Bachelor ...

SEAKR Engineering

Senior FPGA Engineer

Englewood, CO

$130K - $185K/yr

FPGA design experience including thorough design documentation, completion and review of RTL blocks ... junior engineers. * Clear written and verbal communication skills are required. * A Bachelor ...

SEAKR Engineering

Senior FPGA Engineer

Englewood, CO · On-site

$130K - $185K/yr

FPGA design experience including thorough design documentation, completion and review of RTL blocks ... junior engineers. * Clear written and verbal communication skills are required. * A Bachelor ...

Broadcom, Inc.

RTL Design Sign Off Lead

Fort Collins, CO · On-site

$108K - $172.80K/yr

We are seeking a Senior Digital VLSI Design Engineer with deep expertise in Synthesis, DFT, Clock ... RTL freeze. The ideal candidate has 8+ years of experience and a mastery of structural and ...

Broadcom

RTL Design Sign Off Lead

Fort Collins, CO · On-site

$108K - $172.80K/yr

We are seeking a Senior Digital VLSI Design Engineer with deep expertise in Synthesis, DFT, Clock ... RTL freeze. The ideal candidate has 8+ years of experience and a mastery of structural and ...

Atom Computing

Principal ASIC Design Engineer

Boulder, CO · On-site

$180K - $220K/yr

Perform hands-on ASIC design including microarchitecture, RTL development, testing, and integration ... MS or PhD in Electrical Engineering or a related field. * 10+ years of post-degree experience in ...

Atom Computing

Principal ASIC Design Engineer

Boulder, CO · On-site

$180K - $220K/yr

Perform hands-on ASIC design including microarchitecture, RTL development, testing, and integration ... MS or PhD in Electrical Engineering or a related field. * 10+ years of post-degree experience in ...

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Junior Rtl Design Engineer information

See Colorado salary details

$35.2K

$75.5K

$115.1K

How much do junior rtl design engineer jobs pay per year?

As of May 28, 2026, the average yearly pay for junior rtl design engineer in Colorado is $75,498.00, according to ZipRecruiter salary data. Most workers in this role earn between $51,000.00 and $84,100.00 per year, depending on experience, location, and employer.

What are the key skills and qualifications needed to thrive as a Junior RTL Design Engineer, and why are they important?

To thrive as a Junior RTL Design Engineer, a solid background in digital logic design, hardware description languages (such as Verilog or VHDL), and a relevant engineering degree are essential. Experience with simulation and synthesis tools (like ModelSim, Synopsys, or Xilinx Vivado) and a basic understanding of ASIC or FPGA flows are typically required. Strong analytical thinking, attention to detail, and effective teamwork skills help individuals excel in translating specifications into efficient hardware designs. These skills ensure accurate, reliable, and high-performance digital circuit development, which is crucial for meeting project goals and industry standards.

What are some common challenges faced by Junior RTL Design Engineers when transitioning from academic projects to industry roles?

Junior RTL Design Engineers often find the transition from academic projects to industry roles challenging due to the increased complexity and scale of commercial designs. In industry, there is a strong emphasis on meeting strict timing, power, and area requirements, as well as adhering to rigorous verification and documentation standards. Collaboration with verification, physical design, and software teams is essential, and juniors may need to quickly adapt to using industry-standard EDA tools and workflows. Gaining proficiency in debugging and understanding legacy codebases are also typical hurdles. However, most teams provide mentorship and structured onboarding to help new engineers succeed.

What are Junior RTL Design Engineers?

Junior RTL Design Engineers are entry-level professionals who work on designing and verifying the Register Transfer Level (RTL) logic for digital integrated circuits. They typically use hardware description languages like Verilog or VHDL to describe and simulate the functionality of hardware blocks according to specifications. Their responsibilities often include coding, simulation, debugging, and collaborating with senior engineers to ensure the design meets performance and functional requirements. This role is crucial in the process of creating chips and digital systems used in various electronic devices.

What is the difference between Junior Rtl Design Engineer vs Digital Design Engineer?

AspectJunior Rtl Design EngineerDigital Design Engineer
Required CredentialsBachelor's in Electrical Engineering or related field; some certificationsBachelor's or higher in Electrical/Electronic Engineering; certifications vary
Work EnvironmentDesign teams in semiconductor or electronics companiesDesign and development teams in similar industries
Employer & Industry UsageCommonly employed in chip design, FPGA, ASIC developmentUsed in digital circuit and system design across industries

Both roles involve digital circuit design, but Junior Rtl Design Engineers focus more on RTL coding and verification, while Digital Design Engineers may handle broader digital system development. The roles often overlap in skills and work environment, with the main difference being scope and experience level.

What are popular job titles related to Junior Rtl Design Engineer jobs in Colorado? For Junior Rtl Design Engineer jobs in Colorado, the most frequently searched job titles are:
What job categories do people searching Junior Rtl Design Engineer jobs in Colorado look for? The top searched job categories for Junior Rtl Design Engineer jobs in Colorado are:
What cities in Colorado are hiring for Junior Rtl Design Engineer jobs? Cities in Colorado with the most Junior Rtl Design Engineer job openings:
Junior Rtl Design Engineer jobs near you
FPGA Design Eng

FPGA Design Eng

Lockheed Martin

Boulder, CO

$129.50K - $178.40K/yr

Other

Posted 16 days ago

Lockheed Martin rating

8.2

Company rating: 8.2 out of 10

Based on 375 frontline employees who took The Breakroom Quiz

31st of 59 rated aerospace companies

Job description

Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on space-based mission processing capabilities at the edge. This position will help our team evolve ground-based mission processing applications of remote sensing payloads onto flight hardware for onboard mission processing operations. In this role, the FPGA Design Engineer will be responsible for leveraging the Vivado Design Suite, the Vitis development platform (including High-Level Synthesis), and hardware design languages VHDL and Verilog to deploy processing code and algorithms onto flight hardware. This position will work alongside research scientists, software engineers, and other FPGA engineers on the APEX (Advanced Programs and Exploitation) team.
The selected candidate will be expected to:
develop an understanding of mission processing code written in C++ and implement for hardware processing.
develop, integrate, and test processor subsystem features and interfaces in FPGA hardware.
generate requirements, create FPGA code, and test bench development.
contribute to FPGA development workflows using both traditional RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform.
Applicants selected will be subject to a government security investigation and must meet eligibility requirements for access to classified information.
This position is in beautiful Boulder, Colorado at our offices which have a collaborative and modern agile workspace.

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About Lockheed Martin

Sourced by ZipRecruiter

As a global security and aerospace company, the majority of Lockheed Martin's business is with the U.S. Department of Defense and U.S. federal government agencies.The remaining portion of Lockheed Martin's business is comprised of international government and commercial sales of products, services and platforms.

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Bethesda, MD, US

Year founded

1912

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