ZipRecruiter

Log In

1

Junior Rtl Design Engineer Jobs in Colorado (NOW HIRING)

SEAKR Engineering

Senior FPGA Engineer

Englewood, CO · On-site

FPGA design experience including thorough design documentation, completion and review of RTL blocks ... junior engineers. * Clear written and verbal communication skills are required. * A Bachelor ...

SEAKR Engineering

Senior FPGA Engineer

Englewood, CO · On-site

$130K - $185K/yr

FPGA design experience including thorough design documentation, completion and review of RTL blocks ... junior engineers. * Clear written and verbal communication skills are required. * A Bachelor ...

SEAKR Engineering

Senior FPGA Engineer

Englewood, CO · On-site

$130K - $185K/yr

FPGA design experience including thorough design documentation, completion and review of RTL blocks ... junior engineers. * Clear written and verbal communication skills are required. * A Bachelor ...

Broadcom

Physical Design Engineer

Colorado Springs, CO

$134K - $138K/yr

Setup and Synthesizing RTL * Timing closure through various methods and strategies; preferable in ... Collaborating with IC Design RTL Engineers * Must work in person at our Colorado Springs site - no ...

Broadcom

Physical Design Engineer

Colorado Springs, CO · On-site

$134K - $138K/yr

Setup and Synthesizing RTL * Timing closure through various methods and strategies; preferable in ... Collaborating with IC Design RTL Engineers * Must work in person at our Colorado Springs site - no ...

Atom Computing

Senior ASIC Design Engineer

Boulder, CO · On-site

$140K - $175K/yr

Perform hands-on ASIC design including microarchitecture, RTL development, testing, and integration. * Work closely with Atom Computing's quantum physicists, optical engineers, hardware and software ...

Broadcom, Inc.

Design Engineer

Fort Collins, CO · On-site

$60K - $96K/yr

Join a world-class engineering group developing custom CMOS ASICs for cutting-edge AI, Cellular ... Gain exposure to the complete ASIC design cycle - from RTL to GDSII and silicon bring-up.

Broadcom

Design Engineer

Fort Collins, CO · On-site

$60K - $96K/yr

Join a world-class engineering group developing custom CMOS ASICs for cutting-edge AI, Cellular ... Gain exposure to the complete ASIC design cycle - from RTL to GDSII and silicon bring-up.

Atom Computing

Senior ASIC Design Engineer

Boulder, CO · On-site

$140K - $175K/yr

Perform hands-on ASIC design including microarchitecture, RTL development, testing, and integration. * Work closely with Atom Computing's quantum physicists, optical engineers, hardware and software ...

Anduril Industries

FPGA DSP Engineer

Fort Collins, CO · On-site

$121K - $167K/yr

This will require expertise in FPGA design, signal processing, RTL development (SystemVerilog/VHDL ... Collaborate with the Battlespace Awareness engineering team to ensure design consistency and ...

Broadcom

R&D Engineer IC Design

Broomfield, CO · On-site

$108K - $172K/yr

We are looking for engineers that are detail oriented and are capable of designing complex IP ... BSEE and 8+ years of industry experience in RTL design is a must, or MSEE and 6+ years of industry ...

previous pagenext page

Showing results 21-40

All JobsRtl Design Engineer JobsJunior Rtl Design Engineer JobsJunior Rtl Design Engineer Jobs in Colorado

Junior Rtl Design Engineer information

What is a junior RTL design engineer?

Junior RTL Design Engineers are entry-level professionals who work on designing and verifying the Register Transfer Level (RTL) logic for digital integrated circuits. They typically use hardware description languages like Verilog or VHDL to describe and simulate the functionality of hardware blocks according to specifications. Their responsibilities often include coding, simulation, debugging, and collaborating with senior engineers to ensure the design meets performance and functional requirements. This role is crucial in the process of creating chips and digital systems used in various electronic devices.

What are the key skills and qualifications needed to thrive as a junior RTL design engineer?

To thrive as a Junior RTL Design Engineer, a solid background in digital logic design, hardware description languages (such as Verilog or VHDL), and a relevant engineering degree are essential. Experience with simulation and synthesis tools (like ModelSim, Synopsys, or Xilinx Vivado) and a basic understanding of ASIC or FPGA flows are typically required. Strong analytical thinking, attention to detail, and effective teamwork skills help individuals excel in translating specifications into efficient hardware designs. These skills ensure accurate, reliable, and high-performance digital circuit development, which is crucial for meeting project goals and industry standards.

What are some common challenges faced by junior RTL design engineers when transitioning from academic projects to industry roles?

Junior RTL Design Engineers often find the transition from academic projects to industry roles challenging due to the increased complexity and scale of commercial designs. In industry, there is a strong emphasis on meeting strict timing, power, and area requirements, as well as adhering to rigorous verification and documentation standards. Collaboration with verification, physical design, and software teams is essential, and juniors may need to quickly adapt to using industry-standard EDA tools and workflows. Gaining proficiency in debugging and understanding legacy codebases are also typical hurdles. However, most teams provide mentorship and structured onboarding to help new engineers succeed.

What is the difference between Junior Rtl Design Engineer vs Digital Design Engineer?

AspectJunior Rtl Design EngineerDigital Design Engineer
Required CredentialsBachelor's in Electrical Engineering or related field; some certificationsBachelor's or higher in Electrical/Electronic Engineering; certifications vary
Work EnvironmentDesign teams in semiconductor or electronics companiesDesign and development teams in similar industries
Employer & Industry UsageCommonly employed in chip design, FPGA, ASIC developmentUsed in digital circuit and system design across industries

Both roles involve digital circuit design, but Junior Rtl Design Engineers focus more on RTL coding and verification, while Digital Design Engineers may handle broader digital system development. The roles often overlap in skills and work environment, with the main difference being scope and experience level.

What are popular job titles related to Junior Rtl Design Engineer jobs in Colorado?

For Junior Rtl Design Engineer jobs in Colorado, the most frequently searched job titles are:

What job categories do people searching Junior Rtl Design Engineer jobs in Colorado look for?

The top searched job categories for Junior Rtl Design Engineer jobs in Colorado are:

What cities in Colorado are hiring for Junior Rtl Design Engineer jobs?

Cities in Colorado with the most Junior Rtl Design Engineer job openings:

Junior Rtl Design Engineer jobs near you

Senior FPGA Engineer

SEAKR Engineering

Englewood, CO • On-site

Full-time

Medical, Dental, Vision, Retirement, PTO

Re-posted 17 days ago

Job description

Company Description

Join SEAKR Engineering, a leading-edge provider of advanced electronics for space applications. Pushing the boundaries of technology on a mission to change the world for the better from space.

Job Description

Seeking an FPGA Engineer who has extensive knowledge of digital circuit design, state machines, Boolean math and FPGAs.

Candidate shall have experience with

  • Completing multiple FPGA or ASIC design using Verilog and/or VHDL, including at least one of moderate complexity
  • Demonstrate knowledge and development of a test bench with self-checking and simulation (including back annotated timing) for given FPGA modules, top level FPGA, and system with multiple FPGAs
  • FPGA technology differences (Xilinx vs Actel/Microsemi)
  • FPGA process and development flows, especially flows using Synplify Pro, ISE, Vivado and Libero
  • Scripting languages such as TCL or Python
  • Leading small sized teams in order to develop moderately complex systems according to program schedule expectations

Required skills

  • FPGA design experience including thorough design documentation, completion and review of RTL blocks, participation in code reviews, significant RTL debug, and working knowledge of CDC, reset and clock design 
  • Ability to solve digital lab debug problems with use of lab tools such as bench supplies, scopes and logic analyzers 

Knowledge of RTL design techniques for radiation upset mitigation and experience using multiple RTL languages are a plus.

Qualifications
  • Candidate shall also have leadership skills and ability to provide support and technical direction to junior engineers.  
  • Clear written and verbal communication skills are required.
  • A Bachelor's degree in Electrical Engineering or Computer Science is desired. 
  • Must have at least 10+ years of FPGA experience.

Additional Information

Compensation: Base pay range is $130,000-185,000 depending on qualifications. SEAKR has very rich medical, dental and vision insurance plans, along with a generous 401(k) retirement plan. In addition to base salary, employees are eligible for a year-end bonus. SEAKR offers a variety of paid leave, such as vacation, sick, bereavement, and FMLA.

SEAKR is an Equal Opportunity Employer - All your information will be kept confidential according to EEO guidelines. 

US Citizenship Required

Applications will be accepted until 6/19/26