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Junior Rtl Design Engineer Jobs in Greeley, CO (NOW HIRING)

Digital Design RTL Engineer

Fort Collins, CO · On-site

$134K/yr

The ideal candidate has a proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of RTL Design, PPA optimization ...

Digital Design RTL Engineer

Fort Collins, CO · On-site

$134K/yr

The ideal candidate has a proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of RTL Design, PPA optimization ...

Digital Design RTL Engineer

Fort Collins, CO · On-site

$134K/yr

The ideal candidate has a proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of RTL Design, PPA optimization ...

Digital Design RTL Engineer

Fort Collins, CO · On-site

$134K/yr

The ideal candidate has a proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of RTL Design, PPA optimization ...

Digital Design RTL Engineer

Fort Collins, CO · On-site

$134K/yr

The ideal candidate has a proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of RTL Design, PPA optimization ...

Digital Design RTL Engineer

Fort Collins, CO · On-site

$134K/yr

The ideal candidate has a proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of RTL Design, PPA optimization ...

Digital Design RTL Engineer

Fort Collins, CO · On-site

$134K/yr

The ideal candidate has a proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of RTL Design, PPA optimization ...

Join a world-class engineering group developing custom CMOS ASICs for cutting-edge AI, Cellular ... Gain exposure to the complete ASIC design cycle -- from RTL to GDSII and silicon bring‑up.

Join a world-class engineering group developing custom CMOS ASICs for cutting-edge AI, Cellular ... Gain exposure to the complete ASIC design cycle - from RTL to GDSII and silicon bring-up.

Join a world-class engineering group developing custom CMOS ASICs for cutting-edge AI, Cellular ... Gain exposure to the complete ASIC design cycle - from RTL to GDSII and silicon bring-up.

CPU Verification Engineer

Fort Collins, CO · On-site

$134K/yr

Working alongside experienced engineers and closely with RTL design, architecture, and physical design teams, you will contribute to functional verification of L2 and L3 cache designs from block ...

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Junior Rtl Design Engineer information

See Greeley, CO salary details

$32.2K

$69K

$105.2K

How much do junior rtl design engineer jobs pay per year?

As of Sep 10, 2026, the average yearly pay for junior rtl design engineer in Greeley, CO is $68,988.00, according to ZipRecruiter salary data. Most workers in this role earn between $46,600.00 and $76,900.00 per year, depending on experience, location, and employer.

What is a junior RTL design engineer?

Junior RTL Design Engineers are entry-level professionals who work on designing and verifying the Register Transfer Level (RTL) logic for digital integrated circuits. They typically use hardware description languages like Verilog or VHDL to describe and simulate the functionality of hardware blocks according to specifications. Their responsibilities often include coding, simulation, debugging, and collaborating with senior engineers to ensure the design meets performance and functional requirements. This role is crucial in the process of creating chips and digital systems used in various electronic devices.

What are the key skills and qualifications needed to thrive as a junior RTL design engineer?

To thrive as a Junior RTL Design Engineer, a solid background in digital logic design, hardware description languages (such as Verilog or VHDL), and a relevant engineering degree are essential. Experience with simulation and synthesis tools (like ModelSim, Synopsys, or Xilinx Vivado) and a basic understanding of ASIC or FPGA flows are typically required. Strong analytical thinking, attention to detail, and effective teamwork skills help individuals excel in translating specifications into efficient hardware designs. These skills ensure accurate, reliable, and high-performance digital circuit development, which is crucial for meeting project goals and industry standards.

What are some common challenges faced by junior RTL design engineers when transitioning from academic projects to industry roles?

Junior RTL Design Engineers often find the transition from academic projects to industry roles challenging due to the increased complexity and scale of commercial designs. In industry, there is a strong emphasis on meeting strict timing, power, and area requirements, as well as adhering to rigorous verification and documentation standards. Collaboration with verification, physical design, and software teams is essential, and juniors may need to quickly adapt to using industry-standard EDA tools and workflows. Gaining proficiency in debugging and understanding legacy codebases are also typical hurdles. However, most teams provide mentorship and structured onboarding to help new engineers succeed.

What is the difference between Junior Rtl Design Engineer vs Digital Design Engineer?

AspectJunior Rtl Design EngineerDigital Design Engineer
Required CredentialsBachelor's in Electrical Engineering or related field; some certificationsBachelor's or higher in Electrical/Electronic Engineering; certifications vary
Work EnvironmentDesign teams in semiconductor or electronics companiesDesign and development teams in similar industries
Employer & Industry UsageCommonly employed in chip design, FPGA, ASIC developmentUsed in digital circuit and system design across industries

Both roles involve digital circuit design, but Junior Rtl Design Engineers focus more on RTL coding and verification, while Digital Design Engineers may handle broader digital system development. The roles often overlap in skills and work environment, with the main difference being scope and experience level.

What cities near Greeley, CO are hiring for Junior Rtl Design Engineer jobs?

Cities near Greeley, CO with the most Junior Rtl Design Engineer job openings:

Digital Design RTL Engineer

Fort Collins, CO • On-site

Broadcom
Semiconductor and Electronic Component Manufacturing • 10K+ employees

$134K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Re-posted 28 days ago


Broadcom rating

8.7

Company rating: 8.7 out of 10

Based on 23 frontline employees who took The Breakroom Quiz

19th of 163 rated electronics manufacturers


Job description

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Job Description:

The ideal candidate has a proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of RTL Design, PPA optimization, clock domain crossing (CDC) analysis and Reset Domain crossing (RDC). Beyond technical execution, you will collaborate cross-functionally with Architecture, Verification, and Physical Design teams to mitigate risks and ensure project milestones are met on schedule.

Responsibilities include:

  • Operate with a high degree of autonomy, taking designs from initial specification through to timing closure and physical design hand-off

  • Collaborate cross-functionally with Architecture, Verification, and Physical Design teams to mitigate risks and ensure project milestones are met on schedule

  • High proficiency in SystemVerilog

  • Proven track record of delivering high-quality SystemVerilog RTL in advanced process nodes (5nm and below) and possesses a deep understanding of PPA optimization, clock domain crossing (CDC) analysis, and low-power design techniques.

Experience:

  • BSEE required, MSEE/PHD preferred

  • 8+ years of industry experience with a focus on SoC integration, LPDDR5/6, DDR4/5 and/or high-speed SerDes, or HBM protocols is highly preferred.


Compensation and Benefits


The annual base salary range for this position is USD 121,900.00 To USD 195,000.00

As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.


Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.


Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.


If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.


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