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Cpu Rtl Design Engineer Jobs in Colorado (NOW HIRING)

Lockheed Martin

FPGA Design Eng

Boulder, CO · On-site

$129K - $178K/yr

Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on ... RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform. Applicants ...

Lockheed Martin Corporation

FPGA Design Eng

Boulder, CO · On-site

$129K - $178K/yr

Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on ... RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform. Applicants ...

Lockheed Martin

FPGA Design Eng Sr

Boulder, CO

$129K - $178K/yr

Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on ... RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform. Applicants ...

Lockheed Martin Corporation

FPGA Design Eng Sr

Boulder, CO · On-site

$129K - $178K/yr

Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on ... RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform. Applicants ...

Atom Computing

Principal ASIC Design Engineer

Boulder, CO

$180K - $220K/yr

Perform hands-on ASIC design including microarchitecture, RTL development, testing, and integration ... MS or PhD in Electrical Engineering or a related field. * 10+ years of post-degree experience in ...

Atom Computing

Principal ASIC Design Engineer

Boulder, CO

$180K - $220K/yr

Perform hands-on ASIC design including microarchitecture, RTL development, testing, and integration ... MS or PhD in Electrical Engineering or a related field. * 10+ years of post-degree experience in ...

Broadcom

Design Engineer

Fort Collins, CO · On-site

$60K - $96K/yr

Join a world-class engineering group developing custom CMOS ASICs for cutting-edge AI, Cellular ... Gain exposure to the complete ASIC design cycle - from RTL to GDSII and silicon bring-up.

Broadcom, Inc.

Design Engineer

Fort Collins, CO · On-site

$60K - $96K/yr

Join a world-class engineering group developing custom CMOS ASICs for cutting-edge AI, Cellular ... Gain exposure to the complete ASIC design cycle - from RTL to GDSII and silicon bring-up.

SEAKR Engineering

Senior FPGA Engineer

Englewood, CO

Company Description Join SEAKR Engineering, a leading-edge provider of advanced electronics for ... FPGA design experience including thorough design documentation, completion and review of RTL blocks ...

SEAKR Engineering

Senior FPGA Engineer

Englewood, CO · On-site

$130K - $185K/yr

Company Description Join SEAKR Engineering, a leading-edge provider of advanced electronics for ... FPGA design experience including thorough design documentation, completion and review of RTL blocks ...

Lockheed Martin

FPGA Design Eng

Boulder, CO · On-site

$82K - $146K/yr

Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on ... RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform. Applicants ...

SEAKR Engineering

Senior FPGA Engineer

Englewood, CO · On-site

$130K - $185K/yr

Company Description Join SEAKR Engineering, a leading-edge provider of advanced electronics for ... FPGA design experience including thorough design documentation, completion and review of RTL blocks ...

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All JobsCpu Rtl Design Engineer JobsCpu Rtl Design Engineer Jobs in Colorado

Cpu Rtl Design Engineer information

See Colorado salary details

$42.6K

$92.7K

$166.7K

How much do cpu rtl design engineer jobs pay per year?

As of Jun 18, 2026, the average yearly pay for cpu rtl design engineer in Colorado is $92,691.00, according to ZipRecruiter salary data. Most workers in this role earn between $71,500.00 and $103,600.00 per year, depending on experience, location, and employer.

What is the difference between Cpu Rtl Design Engineer vs Cpu Verification Engineer?

AspectCpu Rtl Design EngineerCpu Verification Engineer
Primary FocusDesigning and developing RTL code for CPU componentsVerifying and testing RTL designs for correctness
Skills & CertificationsHDL languages (Verilog/VHDL), FPGA/ASIC design experienceHDL, testbench development, simulation tools
Work EnvironmentDesign teams, hardware development labsVerification teams, simulation environments
Industry UsageSemiconductor companies, CPU design firmsASIC/FPGA verification, chip validation

While both roles require HDL knowledge and work within hardware design environments, Cpu Rtl Design Engineers focus on creating the RTL code for CPU components, whereas Cpu Verification Engineers concentrate on testing and validating those designs to ensure functionality and performance.

What are some common challenges faced by CPU RTL Design Engineers when collaborating with verification and architecture teams?

CPU RTL Design Engineers often work closely with both verification and architecture teams to ensure that the design meets functional and performance requirements. A common challenge is ensuring clear communication of design intent and handling feedback from verification regarding corner cases or bugs. Balancing architectural changes with design timelines and maintaining synchronization across multiple teams can be demanding. Successful engineers proactively document their work, participate in regular sync-ups, and are open to iterative improvements based on collaborative feedback.

What are the key skills and qualifications needed to thrive as a CPU RTL Design Engineer, and why are they important?

To thrive as a CPU RTL Design Engineer, you need a strong background in digital logic design, computer architecture, and proficiency in hardware description languages like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys or Cadence, and experience with simulation, synthesis, and verification methodologies are essential. Strong problem-solving skills, attention to detail, and effective teamwork are crucial soft skills for success in this role. These competencies enable the accurate implementation, debugging, and optimization of complex CPU designs, ensuring performance and reliability in final hardware products.

What are CPU RTL Design Engineers?

CPU RTL (Register Transfer Level) Design Engineers are specialized hardware engineers who design, implement, and verify the digital logic that forms the core of computer processors. They use hardware description languages like Verilog or VHDL to create and simulate the functional blocks of CPUs, ensuring correct operation and optimal performance. Their work involves close collaboration with architecture, verification, and physical design teams to bring processor designs from conception to silicon. They also debug and optimize designs to meet power, speed, and area goals.
What are popular job titles related to Cpu Rtl Design Engineer jobs in Colorado? For Cpu Rtl Design Engineer jobs in Colorado, the most frequently searched job titles are:
What job categories do people searching Cpu Rtl Design Engineer jobs in Colorado look for? The top searched job categories for Cpu Rtl Design Engineer jobs in Colorado are:
Cpu Rtl Design Engineer jobs near you
FPGA Design Eng

FPGA Design Eng

Lockheed Martin

Boulder, CO • On-site

$129K - $178K/yr

Other

Posted 7 days ago

Lockheed Martin rating

8.2

Company rating: 8.2 out of 10

Based on 383 frontline employees who took The Breakroom Quiz

31st of 60 rated aerospace companies

Job description

Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on space-based mission processing capabilities at the edge. This position will help our team evolve ground-based mission processing applications of remote sensing payloads onto flight hardware for onboard mission processing operations. In this role, the FPGA Design Engineer will be responsible for leveraging the Vivado Design Suite, the Vitis development platform (including High-Level Synthesis), and hardware design languages VHDL and Verilog to deploy processing code and algorithms onto flight hardware. This position will work alongside research scientists, software engineers, and other FPGA engineers on the APEX (Advanced Programs and Exploitation) team.
The selected candidate will be expected to:
develop an understanding of mission processing code written in C++ and implement for hardware processing.
develop, integrate, and test processor subsystem features and interfaces in FPGA hardware.
generate requirements, create FPGA code, and test bench development.
contribute to FPGA development workflows using both traditional RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform.
Applicants selected will be subject to a government security investigation and must meet eligibility requirements for access to classified information.
This position is in beautiful Boulder, Colorado at our offices which have a collaborative and modern agile workspace.

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About Lockheed Martin

Sourced by ZipRecruiter

As a global security and aerospace company, the majority of Lockheed Martin's business is with the U.S. Department of Defense and U.S. federal government agencies.The remaining portion of Lockheed Martin's business is comprised of international government and commercial sales of products, services and platforms.

Industry

Manufacturing

Company size

10,000+ Employees

Headquarters location

Bethesda, MD, US

Year founded

1912

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