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Cpu Rtl Design Engineer Jobs in Colorado (NOW HIRING)

Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... The engineer must be knowledgeable of RTL, gate-level netlists, and SDF and capable of analyzing ...

Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... The engineer must be knowledgeable of RTL, gate-level netlists, and SDF and capable of analyzing ...

Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... The engineer must be knowledgeable of RTL, gate-level netlists, and SDF and capable of analyzing ...

FPGA Engineer

Englewood, CO · On-site

$130K - $165K/yr

FPGA Engineer Position Description : Protingent Staffing has an exciting direct hire FPGA Engineer ... Extensive knowledge with FPGA RTL design and development in System Verilog, Verilog, and/or VHDL

FPGA DSP Engineer

Fort Collins, CO · On-site

$143K - $191K/yr

This will require expertise in FPGA design, signal processing, RTL development (SystemVerilog/VHDL ... Collaborate with the Battlespace Awareness engineering team to ensure design consistency and ...

FPGA DSP Engineer

Fort Collins, CO · On-site

$143K - $191K/yr

This will require expertise in FPGA design, signal processing, RTL development (SystemVerilog/VHDL ... Collaborate with the Battlespace Awareness engineering team to ensure design consistency and ...

Develop Python-based behavioral models and validate designs by comparing them against RTL ... Knowledge of CPU, DDR, bus, network protocols, or DSP design * Experience with AI-assisted ...

Verification Engineer

Englewood, CO · Hybrid

$130K - $200K/yr

... Engineer to join our VLSI team. What you will be doing * Plan & implement UVM verification ... RTL Design experience * Experience validating designs for Space Applications Benefits * Competitive ...

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Cpu Rtl Design Engineer information

See Colorado salary details

$42.6K

$92.7K

$166.7K

How much do cpu rtl design engineer jobs pay per year?

As of Jul 9, 2026, the average yearly pay for cpu rtl design engineer in Colorado is $92,691.00, according to ZipRecruiter salary data. Most workers in this role earn between $71,500.00 and $103,600.00 per year, depending on experience, location, and employer.

What is the difference between Cpu Rtl Design Engineer vs Cpu Verification Engineer?

AspectCpu Rtl Design EngineerCpu Verification Engineer
Primary FocusDesigning and developing RTL code for CPU componentsVerifying and testing RTL designs for correctness
Skills & CertificationsHDL languages (Verilog/VHDL), FPGA/ASIC design experienceHDL, testbench development, simulation tools
Work EnvironmentDesign teams, hardware development labsVerification teams, simulation environments
Industry UsageSemiconductor companies, CPU design firmsASIC/FPGA verification, chip validation

While both roles require HDL knowledge and work within hardware design environments, Cpu Rtl Design Engineers focus on creating the RTL code for CPU components, whereas Cpu Verification Engineers concentrate on testing and validating those designs to ensure functionality and performance.

What are some common challenges faced by CPU RTL Design Engineers when collaborating with verification and architecture teams?

CPU RTL Design Engineers often work closely with both verification and architecture teams to ensure that the design meets functional and performance requirements. A common challenge is ensuring clear communication of design intent and handling feedback from verification regarding corner cases or bugs. Balancing architectural changes with design timelines and maintaining synchronization across multiple teams can be demanding. Successful engineers proactively document their work, participate in regular sync-ups, and are open to iterative improvements based on collaborative feedback.

What are the key skills and qualifications needed to thrive as a CPU RTL Design Engineer, and why are they important?

To thrive as a CPU RTL Design Engineer, you need a strong background in digital logic design, computer architecture, and proficiency in hardware description languages like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys or Cadence, and experience with simulation, synthesis, and verification methodologies are essential. Strong problem-solving skills, attention to detail, and effective teamwork are crucial soft skills for success in this role. These competencies enable the accurate implementation, debugging, and optimization of complex CPU designs, ensuring performance and reliability in final hardware products.

What are CPU RTL Design Engineers?

CPU RTL (Register Transfer Level) Design Engineers are specialized hardware engineers who design, implement, and verify the digital logic that forms the core of computer processors. They use hardware description languages like Verilog or VHDL to create and simulate the functional blocks of CPUs, ensuring correct operation and optimal performance. Their work involves close collaboration with architecture, verification, and physical design teams to bring processor designs from conception to silicon. They also debug and optimize designs to meet power, speed, and area goals.
What are popular job titles related to Cpu Rtl Design Engineer jobs in Colorado? For Cpu Rtl Design Engineer jobs in Colorado, the most frequently searched job titles are:
What job categories do people searching Cpu Rtl Design Engineer jobs in Colorado look for? The top searched job categories for Cpu Rtl Design Engineer jobs in Colorado are:
Digital ASIC Design Manager

Digital ASIC Design Manager

Keysight Technologies, Inc.

Colorado Springs, CO

$134K/yr

Other

Medical, Dental, Vision, Life, Retirement, PTO

Re-posted 9 days ago


Keysight Technologies rating

8.1

Company rating: 8.1 out of 10

Based on 20 frontline employees who took The Breakroom Quiz

40th of 141 rated electronics manufacturers


Job description

Overview

Keysight is at the forefront of technology innovation, delivering breakthroughs and trusted insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our ~15,000 employees create world-class solutions in communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets for customers in over 100 countries. Learn more about what we do.

Our award-winning culture embraces a bold vision of where technology can take us and a passion for tackling challenging problems with industry-first solutions. We believe that when people feel a sense of belonging, they can be more creative, innovative, and thrive at all points in their careers.

This role sits within Keysight Laboratories—a globally recognized technology organization that enables Keysight to be first to market with breakthrough, highly differentiated solutions. Our team of senior engineers has delivered generations of innovation across ASIC and product development, spanning the breadth of the technology landscape. You’ll join a high-performance, globally connected engineering organization designing and delivering next-generation Digital ASICs.
A sustained driver of Keysight’s success is the creation and deployment of breakthrough digital and mixed-signal ASICs that unlock step-function performance and customer value in new products. We are seeking a Digital Design ASIC R&D Manager to lead and grow this capability within our ASIC team.

The role is based in Colorado Springs at the foot of Pikes Peak, with a purpose-built development campus that brings engineering, advanced technology development, assembly, and machining together in one location. Outside the lab, the campus supports an active lifestyle with on-site fitness and recreation, and Colorado Springs offers exceptional quality of life—immediate access to world-class outdoor activities, year-round recreation, and more than 300 days of sunshine each year.


Responsibilities
  • Set and drive the technical strategy for digital IP, block-level design, verification, and full-chip integration—aligning architectural choices to product differentiation, schedule, and long-term reuse.
  • Lead, mentor, and scale a high-performing organization of architects, RTL designers, and verification engineers; establish clear technical expectations and a culture of ownership and excellence.
  • Own program delivery from concept through tapeout and into productization—planning resources, managing schedules and milestones, and proactively driving risk retirement and trade-off decisions.
  • Influence outcomes across the broader silicon ecosystem by partnering tightly with physical design, DFT/test, IP, software/firmware, packaging, systems engineering, and foundry/OSAT partners.
  • Establish and enforce robust quality and signoff discipline, including design reviews, coding standards, verification closure, timing and power closure, area/constraints management, and manufacturability/yield considerations.
  • Build a world-class team: recruit and hire top talent, develop technical leaders, and manage performance and career growth to retain key capabilities.
  • Manage the operating model for the team, including budget ownership, EDA/tool strategy, license planning, and vendor/partner selection.
  • Drive continuous improvement in productivity and predictability through design flows, automation, CI/regression infrastructure, and disciplined IP reuse strategies.

Qualifications

Must-have Qualifications

  • B.S. or M.S. in Electrical Engineering, Computer Engineering, or equivalent practical experience.
  • 7+ years of digital IC/ASIC development experience, with demonstrated progression in technical leadership (people management experience preferred).
  • Strong hands-on depth in RTL micro-architecture and implementation (SystemVerilog/Verilog/VHDL), synthesis, STA/timing closure, and power/performance optimization.

Preferred Qualifications

  • Deep expertise in modern verification, including constrained-random methodology, formal techniques, and acceleration/emulation.
  • Working knowledge of the full silicon lifecycle and cross-functional handoffs, including physical design, DFT/scan, signoff flows, and foundry enablement.
  • Proven ability to deliver complex programs to tapeout—building credible plans, managing dependencies and risk, and driving alignment across multiple teams.
  • Proficiency with industry-standard EDA environments (e.g., Cadence and Siemens/Mentor) and productivity scripting/automation (Python, Tcl, and/or Ruby).
  • Executive-level communication skills and strong stakeholder management—able to translate technical trade-offs into clear decisions and commitments.
  • Sound judgment under schedule pressure, with a track record of prioritizing the right trade-offs while maintaining quality.
  • Demonstrated people leadership strengths, including mentoring and coaching engineers, developing technical leaders, and building a strong team culture of accountability, learning, and engineering excellence.

ITAR statement: This position requires access to certain goods, software, technology, or technical data subject to U.S. export control laws and regulations. Under these laws and regulations, U.S. persons (which includes U.S. citizens, U.S. nationals, lawful permanent residents, refugees, and asylees) working for Keysight can access export-controlled items without authorization from the U.S. government. For any individual who is not a U.S. person, Keysight may need authorization from the U.S. Department of State, U.S. Department of Commerce, or other appropriate federal agency before the individual can access export-controlled items. Employment in this position for non-U.S. persons is contingent on Keysight’s ability to obtain any required government authorizations.

We are unable to support visa sponsorship for this position.

Most offers will be between the minimum and the midpoint of the Salary Range listed below.

MIN $151,000.00 - MAX $253,000.00

#LI-MO1

Note: For other locations, pay ranges will vary by region

US Employees may be eligible for the following benefits:

  • Medical, dental and vision
  • Health Savings Account
  • Health Care and Dependent Care Flexible Spending Accounts
  • Life, Accident, Disability insurance
  • Business Travel Accident and Business Travel Health
  • 401(k) Plan
  • Flexible Time Off, Paid Holidays
  • Paid Family Leave
  • Discounts, Perks
  • Tuition Reimbursement
  • Adoption Assistance
  • ESPP (Employee Stock Purchase Plan)

Careers Privacy Statement***Keysight is an Equal Opportunity Employer.***

Qualifications:

Must-have Qualifications

  • B.S. or M.S. in Electrical Engineering, Computer Engineering, or equivalent practical experience.
  • 7+ years of digital IC/ASIC development experience, with demonstrated progression in technical leadership (people management experience preferred).
  • Strong hands-on depth in RTL micro-architecture and implementation (SystemVerilog/Verilog/VHDL), synthesis, STA/timing closure, and power/performance optimization.

Preferred Qualifications

  • Deep expertise in modern verification, including constrained-random methodology, formal techniques, and acceleration/emulation.
  • Working knowledge of the full silicon lifecycle and cross-functional handoffs, including physical design, DFT/scan, signoff flows, and foundry enablement.
  • Proven ability to deliver complex programs to tapeout—building credible plans, managing dependencies and risk, and driving alignment across multiple teams.
  • Proficiency with industry-standard EDA environments (e.g., Cadence and Siemens/Mentor) and productivity scripting/automation (Python, Tcl, and/or Ruby).
  • Executive-level communication skills and strong stakeholder management—able to translate technical trade-offs into clear decisions and commitments.
  • Sound judgment under schedule pressure, with a track record of prioritizing the right trade-offs while maintaining quality.
  • Demonstrated people leadership strengths, including mentoring and coaching engineers, developing technical leaders, and building a strong team culture of accountability, learning, and engineering excellence.

ITAR statement: This position requires access to certain goods, software, technology, or technical data subject to U.S. export control laws and regulations. Under these laws and regulations, U.S. persons (which includes U.S. citizens, U.S. nationals, lawful permanent residents, refugees, and asylees) working for Keysight can access export-controlled items without authorization from the U.S. government. For any individual who is not a U.S. person, Keysight may need authorization from the U.S. Department of State, U.S. Department of Commerce, or other appropriate federal agency before the individual can access export-controlled items. Employment in this position for non-U.S. persons is contingent on Keysight’s ability to obtain any required government authorizations.

We are unable to support visa sponsorship for this position.

Most offers will be between the minimum and the midpoint of the Salary Range listed below.

MIN $151,000.00 - MAX $253,000.00

#LI-MO1

Note: For other locations, pay ranges will vary by region

US Employees may be eligible for the following benefits:

  • Medical, dental and vision
  • Health Savings Account
  • Health Care and Dependent Care Flexible Spending Accounts
  • Life, Accident, Disability insurance
  • Business Travel Accident and Business Travel Health
  • 401(k) Plan
  • Flexible Time Off, Paid Holidays
  • Paid Family Leave
  • Discounts, Perks
  • Tuition Reimbursement
  • Adoption Assistance
  • ESPP (Employee Stock Purchase Plan)

Careers Privacy Statement***Keysight is an Equal Opportunity Employer.***

Education:UNAVAILABLEEmployment Type: UNAVAILABLE

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