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Cpu Rtl Design Engineer Jobs in Colorado (NOW HIRING)

Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... The engineer must be knowledgeable of RTL, gate-level netlists, and SDF and capable of analyzing ...

Design Verification Engineer Broadcom's ASIC Products Division (APD), a worldwide leader in the ... The engineer must be knowledgeable of RTL, gate-level netlists, and SDF and capable of analyzing ...

Senior FPGA Engineer

Fort Collins, CO · On-site

$191K - $253K/yr

This will require expertise in FPGA design, signal processing, RTL development (SystemVerilog/VHDL ... Collaborate with the Battlespace Awareness engineering team to ensure design consistency and ...

Develop Python-based behavioral models and validate designs by comparing them against RTL ... Knowledge of CPU, DDR, bus, network protocols, or DSP design * Experience with AI-assisted ...

ASIC Engineer 2

Longmont, CO · On-site

$143 - $222.01/hr

Position requires: 1. Scripting/Programming languages: Perl, Python, C, or Unix shell scripts; 2. ... Verilog, System Verilog, or VHDL; 3. RTL design and verification; and 4. Physical design aspects ...

ASIC Engineer 2

Longmont, CO · On-site

$143 - $222.01/hr

Position requires: 1. Scripting/Programming languages: Perl, Python, C, or Unix shell scripts; 2. ... Verilog, System Verilog, or VHDL; 3. RTL design and verification; and 4. Physical design aspects ...

... design, verification, and platform teams. Our software architects excel at pushing the ... What you'll be doing: * Collaborate with Hardware and Software Engineers to craft the next ...

FPGA Engineer

Colorado Springs, CO

$114K - $146K/yr

Apply Now RTL, C/C++, Python, VHDL, Verilog, Tcl, cryptography, hardware, embedded software, System ... Key Responsibilities FPGA Design and Development: Design and develop IP cores and FPGA ...

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Cpu Rtl Design Engineer information

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$42.6K

$92.7K

$166.7K

How much do cpu rtl design engineer jobs pay per year?

As of Jun 18, 2026, the average yearly pay for cpu rtl design engineer in Colorado is $92,691.00, according to ZipRecruiter salary data. Most workers in this role earn between $71,500.00 and $103,600.00 per year, depending on experience, location, and employer.

What is the difference between Cpu Rtl Design Engineer vs Cpu Verification Engineer?

AspectCpu Rtl Design EngineerCpu Verification Engineer
Primary FocusDesigning and developing RTL code for CPU componentsVerifying and testing RTL designs for correctness
Skills & CertificationsHDL languages (Verilog/VHDL), FPGA/ASIC design experienceHDL, testbench development, simulation tools
Work EnvironmentDesign teams, hardware development labsVerification teams, simulation environments
Industry UsageSemiconductor companies, CPU design firmsASIC/FPGA verification, chip validation

While both roles require HDL knowledge and work within hardware design environments, Cpu Rtl Design Engineers focus on creating the RTL code for CPU components, whereas Cpu Verification Engineers concentrate on testing and validating those designs to ensure functionality and performance.

What are some common challenges faced by CPU RTL Design Engineers when collaborating with verification and architecture teams?

CPU RTL Design Engineers often work closely with both verification and architecture teams to ensure that the design meets functional and performance requirements. A common challenge is ensuring clear communication of design intent and handling feedback from verification regarding corner cases or bugs. Balancing architectural changes with design timelines and maintaining synchronization across multiple teams can be demanding. Successful engineers proactively document their work, participate in regular sync-ups, and are open to iterative improvements based on collaborative feedback.

What are the key skills and qualifications needed to thrive as a CPU RTL Design Engineer, and why are they important?

To thrive as a CPU RTL Design Engineer, you need a strong background in digital logic design, computer architecture, and proficiency in hardware description languages like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with industry-standard EDA tools such as Synopsys or Cadence, and experience with simulation, synthesis, and verification methodologies are essential. Strong problem-solving skills, attention to detail, and effective teamwork are crucial soft skills for success in this role. These competencies enable the accurate implementation, debugging, and optimization of complex CPU designs, ensuring performance and reliability in final hardware products.

What are CPU RTL Design Engineers?

CPU RTL (Register Transfer Level) Design Engineers are specialized hardware engineers who design, implement, and verify the digital logic that forms the core of computer processors. They use hardware description languages like Verilog or VHDL to create and simulate the functional blocks of CPUs, ensuring correct operation and optimal performance. Their work involves close collaboration with architecture, verification, and physical design teams to bring processor designs from conception to silicon. They also debug and optimize designs to meet power, speed, and area goals.
What are popular job titles related to Cpu Rtl Design Engineer jobs in Colorado? For Cpu Rtl Design Engineer jobs in Colorado, the most frequently searched job titles are:
Design Verification Engineer

Design Verification Engineer

Broadcom, Inc.

Broomfield, CO • On-site

$108K - $172K/yr

Full-time

Medical, Dental, Vision, Retirement, PTO

Posted 28 days ago


Broadcom rating

8.7

Company rating: 8.7 out of 10

Based on 23 frontline employees who took The Breakroom Quiz

11th of 139 rated electronics manufacturers


Job description

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Job Description:
Design Verification Engineer
Broadcom's ASIC Products Division (APD), a worldwide leader in the design of complex custom ASICs and embedded IP, is looking for an experienced verification engineer that will be responsible for modeling and verification activities related to complex digital and mixed signal (MXS) IP blocks used in Broadcom's ASIC developments.
Position Description:
The engineer will be responsible for defining verification plans and environment architecture, developing test cases and test bench components, coverage analysis and closure, and debug. This position may involve working with emulation and FPGA prototyping platforms and leading efforts in evaluating and driving the adoption of advanced verification methodologies/flows. The engineer will be expected to develop functional models to facilitate the block, system, and ASIC level verification. The candidate must work closely with the design teams and EDA vendors to accomplish the modeling and verification tasks.
The candidate must have experience using SystemVerilog and UVM, designing verification components including UVM agents, checkers, and behavioral models. Experience with implementing and achieving coverage goals by developing random & directed test cases, and SystemVerilog Assertions. This engineer will be responsible for analyzing and debugging simulation failures at the RTL and gate-level. The engineer must be knowledgeable of RTL, gate-level netlists, and SDF and capable of analyzing such formats in the verification context.
Requirements
  • 6+ years of experience with verification concepts and architectures for complex digital and MXS circuits
  • Experience verifying designs at the block and system levels.
  • Experience with complex digital and mixed-signal circuits (PLL, DLL, ADC, DAC)
  • Experience debugging RTL and gate-level netlists, analyzing schematic diagrams of analog / MXS circuits
  • Experience using SystemVerilog and advanced verification concepts and methodologies (UVM, SVA)
  • Experience with Synopsys, Cadence, and Mentor simulations tools
  • Demonstrated ability to plan and deploy complex, reusable, and scalable verification environments
  • Experience with Perl/Python and Tcl or other scripting languages
  • Experience with version control systems (DesignSync, git)
  • Superior writing, grammar, and verbal communication skills
  • Excellent problem solver; develops and employs automated processes where applicable
  • Worked independently and in a global team and dynamic environment in a highly visible role
  • Possesses ability to learn and adapt to new tools and methodologies on the fly
  • Must have legal authorization to work in the US

It is a plus if the candidate has expertise in one or more of the following areas:
  • Experience with hardware design and debug
  • Experience with emulation (Palladium, Veloce, Zebu) and FPGA (Xilinx) platforms
  • Formal verification concepts / experience is a plus
  • Experience with verifying iJTAG network using ICL and PDL in the Tessent tool a plus
  • Experience with co-simulation a plus

Education and Experience required:
  • BS in Electrical Engineering / Computer Engineering and 8+ years of related experience or an MS in Electrical Engineering / Computer Engineering and 6+ years of related experience.

Additional Job Description:
Compensation and Benefits
The annual base salary range for this position is $108,000 - $172,800.
As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.

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