$106 - $149/hr
... internship experiences and or schoolwork/classes/research. Minimum Qualifications: Bachelor ... Experience with system Verilog and UVM environment Experience with computer architecture Experience ...
Posted today
$106 - $149/hr
... internship experiences and or schoolwork/classes/research. Minimum Qualifications: Bachelor ... Experience with system Verilog and UVM environment Experience with computer architecture Experience ...
Posted today
$106 - $149/hr
... internship experiences and or schoolwork/classes/research. Minimum Qualifications: Bachelor ... Experience with system Verilog and UVM environment Experience with computer architecture Experience ...
Posted today
Santa Clara, CA · On-site
$159K - $195K/yr
... of UVM testbench components and other verification testing collaterals.You will be a member of a ... every stage - from internship to retirement and through life's most important moments. Our ...
Santa Clara, CA · On-site
$159K - $195K/yr
... of UVM testbench components and other verification testing collaterals.You will be a member of a ... every stage - from internship to retirement and through life's most important moments. Our ...
Westborough, MA · On-site
$140K - $171K/yr
Experience with Verilog andSystemVerilog, preferably with UVM. * Basicproficiencywith C/C ... every stage - from internship to retirement and through life's most important moments. Our ...
Westborough, MA · On-site
$140K - $171K/yr
Experience with Verilog andSystemVerilog, preferably with UVM. * Basicproficiencywith C/C ... every stage - from internship to retirement and through life's most important moments. Our ...
Folsom, CA · On-site
$106 - $149/hr
... internship experiences and or schoolwork/classes/research. Minimum Qualifications: Bachelor ... Experience with system Verilog and UVM environment Experience with computer architecture Experience ...
Posted today
Folsom, CA · On-site
$106 - $149/hr
... internship experiences and or schoolwork/classes/research. Minimum Qualifications: Bachelor ... Experience with system Verilog and UVM environment Experience with computer architecture Experience ...
Posted today
Richardson, TX · On-site
$72K - $124K/yr
Utilize UVM-based environments for coverage-driven verification. * Analyze coverage reports and ... Prior related internship or co-op experience. * Demonstrated prior leadership experience in the ...
Richardson, TX · On-site
$72K - $124K/yr
Utilize UVM-based environments for coverage-driven verification. * Analyze coverage reports and ... Prior related internship or co-op experience. * Demonstrated prior leadership experience in the ...
Santa Clara, CA · On-site
$159K - $195K/yr
Build and enhance UVM/System Verilog-based verification environments * Develop test benches ... every stage - from internship to retirement and through life's most important moments. Our ...
Santa Clara, CA · On-site
$159K - $195K/yr
Build and enhance UVM/System Verilog-based verification environments * Develop test benches ... every stage - from internship to retirement and through life's most important moments. Our ...
Chandler, AZ · On-site
$87K - $130K/yr
Internship, co-op, or academic project experience with FPGAs, SoCs, or digital hardware (VHDL ... Understanding of OSVVM or UVM verification methodologies. * Interested in high-speed PCB design and ...
Chandler, AZ · On-site
$87K - $130K/yr
Internship, co-op, or academic project experience with FPGAs, SoCs, or digital hardware (VHDL ... Understanding of OSVVM or UVM verification methodologies. * Interested in high-speed PCB design and ...
Chandler, AZ · On-site
$87K - $130K/yr
Internship, co-op, or academic project experience with FPGAs, SoCs, or digital hardware (VHDL ... Understanding of OSVVM or UVM verification methodologies. * Interested in high-speed PCB design and ...
Chandler, AZ · On-site
$87K - $130K/yr
Internship, co-op, or academic project experience with FPGAs, SoCs, or digital hardware (VHDL ... Understanding of OSVVM or UVM verification methodologies. * Interested in high-speed PCB design and ...
Chandler, AZ · On-site
$87K - $130K/yr
... Internship, co-op, or academic project experience with FPGAs, SoCs, or digital hardware (VHDL ... Understanding of OSVVM or UVM verification methodologies. Interested in high-speed PCB design and ...
Chandler, AZ · On-site
$87K - $130K/yr
... Internship, co-op, or academic project experience with FPGAs, SoCs, or digital hardware (VHDL ... Understanding of OSVVM or UVM verification methodologies. Interested in high-speed PCB design and ...
Santa Clara, CA · On-site
$159K - $195K/yr
Build and enhance UVM/System Verilog-based verification environments * Develop test benches ... every stage - from internship to retirement and through life's most important moments. Our ...
Santa Clara, CA · On-site
$159K - $195K/yr
Build and enhance UVM/System Verilog-based verification environments * Develop test benches ... every stage - from internship to retirement and through life's most important moments. Our ...
Folsom, CA · On-site
$105K - $149K/yr
... internship experiences and or schoolwork/classes/research. Minimum Qualifications: * Bachelor ... Experience with system Verilog and UVM environment * Experience with computer architecture
Folsom, CA · On-site
$105K - $149K/yr
... internship experiences and or schoolwork/classes/research. Minimum Qualifications: * Bachelor ... Experience with system Verilog and UVM environment * Experience with computer architecture
Boise, ID · On-site
$129K - $158K/yr
... or internship experience * Understanding of digital logic and semiconductor fundamentals ... Experience with SystemVerilog, UVM, SpectreFx, or PrimeSim * Interest or experience applying AI to ...
Boise, ID · On-site
$129K - $158K/yr
... or internship experience * Understanding of digital logic and semiconductor fundamentals ... Experience with SystemVerilog, UVM, SpectreFx, or PrimeSim * Interest or experience applying AI to ...
Boise, ID · On-site
$70 - $90/hr
... internship experience. * Understanding of digital logic and semiconductor fundamentals ... Experience with SystemVerilog, UVM, SpectreFx, or PrimeSim. * Interest or experience applying AI to ...
Boise, ID · On-site
$70 - $90/hr
... internship experience. * Understanding of digital logic and semiconductor fundamentals ... Experience with SystemVerilog, UVM, SpectreFx, or PrimeSim. * Interest or experience applying AI to ...
$18 - $23.50/hr
The internship program requires some exposure to the programming and scripting languages like Verilog, System Verilog, UVM, C and C++, Perl, Python or assembly code. We expect that interns will be ...
$18 - $23.50/hr
The internship program requires some exposure to the programming and scripting languages like Verilog, System Verilog, UVM, C and C++, Perl, Python or assembly code. We expect that interns will be ...
Dallas, TX · On-site +1
$134K - $164K/yr
... internships, or coursework in digital design, verification, or semiconductor engineering are encouraged to apply. * Exposure to Universal Verification Methodology (UVM), constrained-random ...
Dallas, TX · On-site +1
$134K - $164K/yr
... internships, or coursework in digital design, verification, or semiconductor engineering are encouraged to apply. * Exposure to Universal Verification Methodology (UVM), constrained-random ...
Dallas, TX · On-site
$134K - $164K/yr
... internships, or coursework in digital design, verification, or semiconductor engineering are encouraged to apply. * Exposure to Universal Verification Methodology (UVM), constrained-random ...
Dallas, TX · On-site
$134K - $164K/yr
... internships, or coursework in digital design, verification, or semiconductor engineering are encouraged to apply. * Exposure to Universal Verification Methodology (UVM), constrained-random ...
... experience, internship experience and / or schoolwork/classes/research. The preferred ... Experience in simulation and formal verification methodologies including UVM, SVA, ABV, and co ...
... experience, internship experience and / or schoolwork/classes/research. The preferred ... Experience in simulation and formal verification methodologies including UVM, SVA, ABV, and co ...
... experience, internship experience and / or schoolwork/classes/research. The preferred ... Experience in simulation and formal verification methodologies including UVM, SVA, ABV, and co ...
... experience, internship experience and / or schoolwork/classes/research. The preferred ... Experience in simulation and formal verification methodologies including UVM, SVA, ABV, and co ...
Boise, ID · On-site
$129K - $158K/yr
... or internship experience * Understanding of digital logic and semiconductor fundamentals ... Experience with SystemVerilog, UVM, SpectreFx, or PrimeSim * Interest or experience applying AI to ...
Boise, ID · On-site
$129K - $158K/yr
... or internship experience * Understanding of digital logic and semiconductor fundamentals ... Experience with SystemVerilog, UVM, SpectreFx, or PrimeSim * Interest or experience applying AI to ...
San Diego, CA · On-site
$144K/yr
Expertise with SystemVerilog, UVM. * Expertise with writing a detailed test plan and building a ... every stage - from internship to retirement and through life's most important moments. Our ...
San Diego, CA · On-site
$144K/yr
Expertise with SystemVerilog, UVM. * Expertise with writing a detailed test plan and building a ... every stage - from internship to retirement and through life's most important moments. Our ...
$11.06 - $12.74
1% of jobs
$12.74 - $14.42
0% of jobs
$14.42 - $16.11
3% of jobs
$16.11 - $17.79
17% of jobs
$18.31 is the 25th percentile. Wages below this are outliers.
$17.79 - $19.47
14% of jobs
The median wage is $21.05 / hr.
$19.47 - $21.15
17% of jobs
$21.15 - $22.84
23% of jobs
$23 is the 75th percentile. Wages above this are outliers.
$22.84 - $24.52
10% of jobs
$24.52 - $26.20
5% of jobs
$26.20 - $27.88
6% of jobs
$27.88 - $29.57
4% of jobs
$11
$21
$29
| Aspect | Internship Uvm Verification | Uvm Verification Engineer |
|---|---|---|
| Credentials | Enrolled in or recent graduate of relevant engineering or computer science program | Bachelor's or Master's in Electrical Engineering, Computer Engineering, or related field; experience with UVM |
| Work Environment | Internship setting, supervised, focused on learning and assisting | Full-time professional role, responsible for designing and executing verification plans |
| Industry Usage | Used as a training or entry point in semiconductor and hardware companies | Standard role in ASIC/FPGA design companies, involved in verification projects |
In summary, Internship Uvm Verification is an entry-level position aimed at students or recent graduates gaining hands-on experience, while Uvm Verification Engineer is a full-time professional role responsible for verification tasks in hardware design projects.
Cities with the most Internship Uvm Verification job openings:
The most popular types of Uvm Verification jobs are:
States with the most job openings for Internship Uvm Verification jobs include:
The top searched job categories for Internship Uvm Verification jobs are:

$106 - $149/hr
Other
Medical, Retirement, PTO
Posted 22 hours ago
Posted today
8.7
Based on 147 frontline employees who took The Breakroom Quiz
18th of 161 rated electronics manufacturers
Job Details: Job Description: Performs functional verification of graphics logic components, including 3D graphics, media, and display, to ensure design will meet specification requirements. Defines and develops scalable and reusable IP verification plans, test benches, and architecture for verification environment to ensure coverage to confirm to graphics microarchitecture specifications. Executes verification plans and defines and runs system simulation models to verify the design, analyze power and timing, and uncover bugs. Replicates, root causes, and debugs issues in the pre-silicon environment. Finds and implements corrective measures to resolve failing tests. Collaborates with GPU architects, RTL developers, and physical design teams to improve verification of complex architectural and microarchitectural features and to meet functional, performance, and power goals. Documents test plans and drives technical reviews of plans and proofs with design and architecture teams. Maintains and improves existing functional verification infrastructure and methodology. Participates in the definition of verification infrastructure and related TFMs needed for functional design verification.
Qualifications: Minimum qualifications are required to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates. Requirements listed would be obtained through a combination of industry relevant job experience, internship experiences and or schoolwork/classes/research. Minimum Qualifications: Bachelor's Degree in Electrical Engineering or related field of study with 1+ years of relevant experience or a MS in Electrical Engineering or related field of study. Experience with system Verilog and UVM environment Experience with computer architecture Experience with ASIC Design and Verification Debug experience with simulation models. Preferred Qualifications: GPU architecture knowledge Test plan, coverage plan coding and execution experience Familiar with AI tools for design and verification Familiarity with ML tools Memory architecture knowledge
Job Type: College Grad Shift: Shift 1 (United States of America) Primary Location: US, California, Folsom Additional Locations: Posting Statement: All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A
Benefits We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock bonuses, and benefit programs which include health, retirement, and vacation. Find out more about the benefits of working at Intel.
Annual Salary Range for jobs which could be performed in the US: $105,650.00-149,150.00 USD The range displayed on this job posting reflects the minimum and maximum target compensation for the position across all US locations. Within the range, individual pay is determined by work location and additional factors, including job-related skills, experience, and relevant education or training. Your recruiter can share more about the specific compensation range for your preferred location during the hiring process.
Work Model for this Role This role will require an on-site presence. * Job posting details (such as work model, location or time type) are subject to change. * ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
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Intel strives to make every facet of semiconductor manufacturing state-of-the-art -- from semiconductor process development and manufacturing, through yield improvement to packaging, final test and optimization, and world class Supply Chain and facilities support. Employees in the Technology and Manufacturing Group are part of a worldwide network of design, development, manufacturing, and assembly/test facilities, all focused on utilizing the power of Moore's Law to bring smart, connected devices to every person on Earth
Manufacturing
10,000+ Employees
Santa Clara, CA, US
1968