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Internship Power Management Ic Design Jobs (NOW HIRING)

Digital IC Design Engineer

Aliso Viejo, CA · On-site

$145K/yr

As a Digital IC Design Engineer you will be responsible for managing and executing activities ... power management. * Drive and/or support the implementation of innovative security features for ...

Lead IC Design Engineer

Santa Clara, CA · Hybrid

$238K/yr

Plan & manage evaluation of prototype silicon in close collaboration with the application and ... power detectors, VGAs. * Good understanding of S-parameters, transmission lines, IC design ...

MTS Digital Design Engineer

San Jose, CA · On-site

$159K/yr

This group is responsible for development of Power management products including Multiphase ... Lead a Digital IC design team with product ownership and responsibility from definition to release ...

MTS Digital Design Engineer

San Jose, CA · On-site

$159K/yr

This group is responsible for development of Power management products including Multiphase ... Lead a Digital IC design team with product ownership and responsibility from definition to release ...

Strong background in analog and digital mixed-signal design, including charge pumps, power control ... Strong communication, leadership, and project management skills Education: * Master's Degree (MEng ...

Drive development of sophisticated mixed-signal circuits, including PLLs, power management units ... Design and Verification: Direct the characterization and maintenance of standard cell libraries ...

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Internship Power Management Ic Design information

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How much do internship power management ic design jobs pay per hour?

As of Jun 17, 2026, the average hourly pay for internship power management ic design in the United States is $19.38, according to ZipRecruiter salary data. Most workers in this role earn between $14.42 and $21.63 per hour, depending on experience, location, and employer.

What are Internship Power Management IC Design positions?

Internship Power Management IC Design positions are entry-level opportunities for students or recent graduates interested in learning about the design and development of integrated circuits (ICs) that manage power within electronic devices. Interns in this field work alongside experienced engineers to assist with tasks like schematic design, circuit simulation, testing, and documentation. These internships provide hands-on experience in the semiconductor industry, exposure to industry-standard tools, and insight into how power efficiency is achieved in modern electronics. It’s a valuable stepping stone for those aiming for a career in analog or mixed-signal IC design.

What is the difference between Internship Power Management Ic Design vs Power Management IC Design Engineer?

AspectInternship Power Management IC DesignPower Management IC Design Engineer
CredentialsEnrolled in or recent graduate in Electrical Engineering or related fieldBachelor's or Master's in Electrical Engineering, with experience preferred
Work EnvironmentInternship projects, supervised, entry-level tasksFull-time professional role, responsible for design and development
ResponsibilitiesAssisting in design, testing, and documentationLeading design, simulation, and verification of power management ICs

In summary, an Internship Power Management IC Design role is an entry-level position focused on learning and assisting with design tasks, while a Power Management IC Design Engineer is a full-time professional responsible for the complete design process and product development.

What types of projects and responsibilities can I expect during an Internship in Power Management IC Design?

As a Power Management IC Design intern, you will typically assist with circuit design, simulation, and layout for integrated circuits focused on power management. You might work on tasks such as validating design concepts, running electrical simulations, supporting lab measurements, and collaborating with senior engineers to troubleshoot design issues. Interns often get exposure to industry-standard tools and participate in team meetings, providing a well-rounded view of the design process. These hands-on experiences are invaluable for building technical skills and understanding how cross-functional teams—such as layout, verification, and testing—work together to bring a product from concept to silicon.

What are the key skills and qualifications needed to thrive as an Internship Power Management IC Design, and why are they important?

To thrive as an Internship Power Management IC Design, you need a solid understanding of analog and digital circuit design, semiconductor fundamentals, and often enrollment in an electrical engineering or related degree program. Familiarity with EDA tools such as Cadence or Synopsys, and experience with simulation software like SPICE, are commonly expected. Strong problem-solving skills, attention to detail, and effective teamwork make interns stand out in this role. These skills and qualifications are essential for contributing to innovative, reliable IC design solutions in a collaborative engineering environment.
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Infographic showing various Internship Power Management Ic Design job openings in the United States as of June 2026, with employment types broken down into 99% Full Time, and 1% Contract. Highlights an 86% Physical, 4% Hybrid, and 10% Remote job distribution, with an average salary of $40,304 per year, or $19.4 per hour.
Principal Design Engineer

Full-time

Medical, Dental, Vision, PTO

Posted 8 days ago


Job description

Job Purpose:
Navitas Semiconductor is seeking a highly motivated and experienced analog / power IC design engineer to lead the architecture, design, and silicon execution of next-generation power management ICs. This role is hands-on and technical, with end-to-end ownership from concept through production, and close collaboration with systems, device, layout, and validation teams. This is a key technical expert position for engineers who have successfully brought power ICs into high-volume production and want to shape future architectures.


Key Responsibilities and Duties:
• Lead the architecture, design, and verification of power management ICs from transistor-level blocks to full top-level integration.
• Define and evaluate system-level trade-offs for next-generation power supplies in collaboration with applications and systems teams.
• Drive IC architecture decisions for products including AC-DC, DC-DC, ACF, LLC, QR, and related power topologies.
• Interface closely with device, modeling, and EDA teams to optimize device selection, models, and simulation methodologies.
• Guide and review physical layout and floor planning, providing clear feedback to ensure optimal performance, reliability, and manufacturability.
• Own tape-out execution, ensuring designs meet performance, schedule, and quality requirements.
• Lead silicon bring-up, lab validation, debugging, and correlation versus simulation.
• Support yield improvement, failure analysis, and release to production.
• Mentor junior designers and contribute to best practices across the design organization.

Knowledge, Skills, Abilities, and Other Characteristics (KSAO’s)
• Proven experience as chip lead or technical owner on at least one successful silicon program.
• Demonstrated track record of delivering power ICs from concept to high-volume production, including:
     o Architecture definition
     o Circuit design
     o Layout supervision
     o Post-extraction verification
     o Lab characterization and debug
     o Yield and failure analysis support
• Strong experience in AC-DC and/or DC-DC power IC design.
• Deep expertise in analog and mixed-signal building blocks such as:
     o Bandgap references
     o LDOs
     o Comparators
     o Charge pumps
     o Operational amplifiers
• Clear written and verbal communication skills.
• Self-motivated, collaborative, and comfortable working in a fast-paced, startup-like environment.


Required Qualifications
Basic 

• Degree in Electrical Engineering, Material Science, Applied Physics or related Fields
• Strong understanding of semiconductor device physics, SOA, and power transistors used in high-frequency switching.
• Solid knowledge of silicon fabrication processes and their impact on device models and circuit performance.


Preferred: 
• MSEE + 7+ years or PhD + 5+ years of industry experience in analog or mixed-signal IC design.
• Proficiency with EDA tools, including:
     o Cadence Virtuoso / Spectre
     o Post-parasitic extraction simulation
     o Monte Carlo and corner analysis
• Experience with DFT methodologies, characterization strategies, and production test planning.
• Hands-on lab experience with silicon validation, debug, and characterization.


What We Give:
• A high visibility opportunity to work on leading edge technology development with a mission to make the world better with advancing the technology that powers the future.
• Fast decision making and freedom to work on interesting problems that the world cares about.
• A mission to succeed with full support from management.
• Health, dental, and vision benefits, unlimited PTO 
• Total Compensation includes base + bonus and stock awards, depending on experience