... Engineering, or a related field, for the full duration of the internship; anticipated graduation ... Chip-level and System-levelArchitecture GPU and Multi-GPU Architecture Scalable memory systemsand ...
... Engineering, or a related field, for the full duration of the internship; anticipated graduation ... Chip-level and System-levelArchitecture GPU and Multi-GPU Architecture Scalable memory systemsand ...
EDA Workflow Optimization Engineer
Westford, MA · Hybrid
$115K - $136K/yr
Hands-on experience with architectural decisions in technologies (storage, networking, compute) our chip engineers depend on. * Experience with ASIC, VLSI, CAD/EDA or mixed signal design workflow ...
EDA Workflow Optimization Engineer
Westford, MA · Hybrid
$115K - $136K/yr
Hands-on experience with architectural decisions in technologies (storage, networking, compute) our chip engineers depend on. * Experience with ASIC, VLSI, CAD/EDA or mixed signal design workflow ...
EDA Workflow Optimization Engineer
Santa Clara, CA · Hybrid
$130K - $154K/yr
Hands-on experience with architectural decisions in technologies (storage, networking, compute) our chip engineers depend on. * Experience with ASIC, VLSI, CAD/EDA or mixed signal design workflow ...
EDA Workflow Optimization Engineer
Santa Clara, CA · Hybrid
$130K - $154K/yr
Hands-on experience with architectural decisions in technologies (storage, networking, compute) our chip engineers depend on. * Experience with ASIC, VLSI, CAD/EDA or mixed signal design workflow ...
EDA Workflow Optimization Engineer
Austin, TX · Hybrid
$110K - $130K/yr
Hands-on experience with architectural decisions in technologies (storage, networking, compute) our chip engineers depend on. * Experience with ASIC, VLSI, CAD/EDA or mixed signal design workflow ...
EDA Workflow Optimization Engineer
Austin, TX · Hybrid
$110K - $130K/yr
Hands-on experience with architectural decisions in technologies (storage, networking, compute) our chip engineers depend on. * Experience with ASIC, VLSI, CAD/EDA or mixed signal design workflow ...
EDA Workflow Optimization Engineer
Santa Clara, CA · On-site
$130K - $154K/yr
Hands-on experience with architectural decisions in technologies (storage, networking, compute) our chip engineers depend on. * Experience with ASIC, VLSI, CAD/EDA or mixed signal design workflow ...
EDA Workflow Optimization Engineer
Santa Clara, CA · On-site
$130K - $154K/yr
Hands-on experience with architectural decisions in technologies (storage, networking, compute) our chip engineers depend on. * Experience with ASIC, VLSI, CAD/EDA or mixed signal design workflow ...
EDA Workflow Optimization Engineer
Durham, NC · Hybrid
$107K - $127K/yr
Hands-on experience with architectural decisions in technologies (storage, networking, compute) our chip engineers depend on. Experience with ASIC, VLSI, CAD/EDA or mixed signal design workflow ...
EDA Workflow Optimization Engineer
Durham, NC · Hybrid
$107K - $127K/yr
Hands-on experience with architectural decisions in technologies (storage, networking, compute) our chip engineers depend on. Experience with ASIC, VLSI, CAD/EDA or mixed signal design workflow ...
EDA Workflow Optimization Engineer
Santa Clara, CA · Hybrid
$130K - $154K/yr
Hands-on experience with architectural decisions in technologies (storage, networking, compute) our chip engineers depend on. Experience with ASIC, VLSI, CAD/EDA or mixed signal design workflow ...
EDA Workflow Optimization Engineer
Santa Clara, CA · Hybrid
$130K - $154K/yr
Hands-on experience with architectural decisions in technologies (storage, networking, compute) our chip engineers depend on. Experience with ASIC, VLSI, CAD/EDA or mixed signal design workflow ...
EDA Workflow Optimization Engineer
Westford, MA · Hybrid
$115K - $136K/yr
Hands-on experience with architectural decisions in technologies (storage, networking, compute) our chip engineers depend on. Experience with ASIC, VLSI, CAD/EDA or mixed signal design workflow ...
EDA Workflow Optimization Engineer
Westford, MA · Hybrid
$115K - $136K/yr
Hands-on experience with architectural decisions in technologies (storage, networking, compute) our chip engineers depend on. Experience with ASIC, VLSI, CAD/EDA or mixed signal design workflow ...
Application Engineer
Rio Rancho, NM · On-site
... computer chip worldwide. Nova operates at the atomic level, delivering unique insights through ... As Applications Engineer at Nova you will play a key role in implementing and optimizing advanced ...
Quick apply
Application Engineer
Rio Rancho, NM · On-site
... computer chip worldwide. Nova operates at the atomic level, delivering unique insights through ... As Applications Engineer at Nova you will play a key role in implementing and optimizing advanced ...
EDA Workflow Optimization Engineer
Durham, NC · Hybrid
$107K - $127K/yr
Hands-on experience with architectural decisions in technologies (storage, networking, compute) our chip engineers depend on. * Experience with ASIC, VLSI, CAD/EDA or mixed signal design workflow ...
EDA Workflow Optimization Engineer
Durham, NC · Hybrid
$107K - $127K/yr
Hands-on experience with architectural decisions in technologies (storage, networking, compute) our chip engineers depend on. * Experience with ASIC, VLSI, CAD/EDA or mixed signal design workflow ...
Application Engineer
Rio Rancho, NM · On-site
... computer chip worldwide. Nova operates at the atomic level, delivering unique insights through ... As Applications Engineer at Nova you will play a key role in implementing and optimizing advanced ...
Application Engineer
Rio Rancho, NM · On-site
... computer chip worldwide. Nova operates at the atomic level, delivering unique insights through ... As Applications Engineer at Nova you will play a key role in implementing and optimizing advanced ...
EDA Workflow Optimization Engineer
Austin, TX · Hybrid
$110K - $130K/yr
Hands-on experience with architectural decisions in technologies (storage, networking, compute) our chip engineers depend on. Experience with ASIC, VLSI, CAD/EDA or mixed signal design workflow ...
EDA Workflow Optimization Engineer
Austin, TX · Hybrid
$110K - $130K/yr
Hands-on experience with architectural decisions in technologies (storage, networking, compute) our chip engineers depend on. Experience with ASIC, VLSI, CAD/EDA or mixed signal design workflow ...
We're seeking a CAD Engineer to join our team and develop full-stack web applications that power ... chip design, VLSI, or CAD tools Interest in AI/ML technologies Personal projects or internships ...
We're seeking a CAD Engineer to join our team and develop full-stack web applications that power ... chip design, VLSI, or CAD tools Interest in AI/ML technologies Personal projects or internships ...
Undergraduate Internship - Immune Organ on Chip
Boston, MA · On-site
$20 - $25/hr
Undergraduate Internship - Immune Organ on Chip Title - Undergraduate Internship - Immune Organ on Chip School - Wyss Institute for Biologically Inspired Engineering Department/Area - Immune Organs ...
Undergraduate Internship - Immune Organ on Chip
Boston, MA · On-site
$20 - $25/hr
Undergraduate Internship - Immune Organ on Chip Title - Undergraduate Internship - Immune Organ on Chip School - Wyss Institute for Biologically Inspired Engineering Department/Area - Immune Organs ...
This internship runs for four weeks, approximately 24 hours per week, with flexible scheduling and ... Ideal candidates will demonstrate knowledge of programming concepts and familiarity with one or ...
Quick apply
This internship runs for four weeks, approximately 24 hours per week, with flexible scheduling and ... Ideal candidates will demonstrate knowledge of programming concepts and familiarity with one or ...
Internship -Computer Science Related Major (IBM Planning Analytics)
Parsippany, NJ · On-site +1
$25/hr
This internship runs for four weeks, approximately 24 hours per week, with flexible scheduling and ... Ideal candidates will demonstrate knowledge of programming concepts and familiarity with one or ...
Internship -Computer Science Related Major (IBM Planning Analytics)
Parsippany, NJ · On-site +1
$25/hr
This internship runs for four weeks, approximately 24 hours per week, with flexible scheduling and ... Ideal candidates will demonstrate knowledge of programming concepts and familiarity with one or ...
This internship runs for four weeks, approximately 24 hours per week, with flexible scheduling and ... Ideal candidates will demonstrate knowledge of programming concepts and familiarity with one or ...
This internship runs for four weeks, approximately 24 hours per week, with flexible scheduling and ... Ideal candidates will demonstrate knowledge of programming concepts and familiarity with one or ...
Engineering Intern ENMW25051
Lexington Park, MD · On-site
$20 - $26/hr
Accepted by or currently working towards a bachelor's degree in one of the following majors (at the start of the internship): * Computer Science * Computer Engineering * Electrical Engineering
Engineering Intern ENMW25051
Lexington Park, MD · On-site
$20 - $26/hr
Accepted by or currently working towards a bachelor's degree in one of the following majors (at the start of the internship): * Computer Science * Computer Engineering * Electrical Engineering
Engineering Intern ENMW25051
Lexington Park, MD · On-site
$20 - $26/hr
Accepted by or currently working towards a bachelor's degree in one of the following majors (at the start of the internship): * Computer Science * Computer Engineering * Electrical Engineering
Engineering Intern ENMW25051
Lexington Park, MD · On-site
$20 - $26/hr
Accepted by or currently working towards a bachelor's degree in one of the following majors (at the start of the internship): * Computer Science * Computer Engineering * Electrical Engineering
Engineering Intern ENMW25051
Lexington Park, MD · On-site
$20 - $26/hr
Accepted by or currently working towards a bachelor's degree in one of the following majors (at the start of the internship): * Computer Science * Computer Engineering * Electrical Engineering
Quick apply
Engineering Intern ENMW25051
Lexington Park, MD · On-site
$20 - $26/hr
Accepted by or currently working towards a bachelor's degree in one of the following majors (at the start of the internship): * Computer Science * Computer Engineering * Electrical Engineering
Internship Computer Chip Engineer information
See salary details
$11.06 - $12.74
2% of jobs
$12.74 - $14.42
4% of jobs
$16.11 is the 25th percentile. Wages below this are outliers.
$14.42 - $16.11
19% of jobs
$16.11 - $17.79
24% of jobs
The median wage is $17.89 / hr.
$17.79 - $19.47
17% of jobs
$20.48 is the 75th percentile. Wages above this are outliers.
$19.47 - $21.15
16% of jobs
$21.15 - $22.84
6% of jobs
$22.84 - $24.52
5% of jobs
$24.52 - $26.20
3% of jobs
$26.20 - $27.88
3% of jobs
$27.88 - $29.57
1% of jobs
$11
$19
$29
How much do internship computer chip engineer jobs pay per hour?
What is the difference between Internship Computer Chip Engineer vs Entry-Level Computer Chip Engineer?
| Aspect | Internship Computer Chip Engineer | Entry-Level Computer Chip Engineer |
|---|---|---|
| Qualifications | Currently enrolled or recent graduate, some coursework in electrical engineering or computer engineering | Bachelor's degree in electrical/computer engineering or related field |
| Work Environment | Internship programs, supervised tasks, learning-focused | Full-time professional role, project responsibilities |
| Employer & Industry | Tech companies, semiconductor firms, research labs | Semiconductor companies, tech firms, manufacturing |
Internship Computer Chip Engineers are students or recent graduates gaining hands-on experience, often part-time or temporary. Entry-Level Computer Chip Engineers are full-time professionals responsible for designing and testing chips. Internships serve as a stepping stone, while entry-level roles involve more responsibility and independence in the industry.
What cities are hiring for Internship Computer Chip Engineer jobs?
Cities with the most Internship Computer Chip Engineer job openings:
What are the most commonly searched types of Computer Chip Engineer jobs?
The most popular types of Computer Chip Engineer jobs are:
What states have the most Internship Computer Chip Engineer jobs?
States with the most job openings for Internship Computer Chip Engineer jobs include:
What job categories do people searching Internship Computer Chip Engineer jobs look for?
The top searched job categories for Internship Computer Chip Engineer jobs are:
- Flex Schedule Software Engineer Internships
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- Intern Tailwind Css
- Visa Sponsorship Software Engineer Internship
- Internship International Software Engineer
- Internship Software Engineer Ncr
- Internship Vanguard Software Engineer
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NVIDIA 2027 Internships: Ph.D. Research Computer Architecture and Systems
Santa Clara, CA
9.6
Based on 18 frontline employees who took The Breakroom Quiz
7th of 247 rated software companies
Great coworkers
People enjoy working here
Good employer
Respectful managers
Learn new skills
Full-time
Posted 12 days ago
Job description
By submitting your resume, you acknowledge that your Ph.D. Research Computer Architecture and Systems internship application will be processed in accordance with NVIDIA's Applicant Privacy Policy and you agree to our Terms of Service. We'll review resumes on an ongoing basis, and a recruiter may reach out if your experience fits one of our many internship opportunities.
NVIDIA pioneered accelerated computing to tackle challenges no one else can solve. Our work in AI and digital twins is transforming the world's largest industries and profoundly impacting society - from gaming to robotics, self-driving cars to life-saving healthcare, climate change to virtual worlds where we can all connect and create.
Our internships offer an excellent opportunity to expand your career and get hands on experience with one of our industry leading Computer Architecture and Systems teams.We'reseekingstrategic, ambitious, hard-working,collaborative,and creative individuals who are passionate about helping us tackle challenges no one else can solve.
Learn more aboutResearch at NVIDIA.
What you will be doing:
Design and implement novel ideas in GPU and CPU architectures, systems architectures, operating systems, AI systems, and distributed systems that advance computing, graphics, media processing, and related technologies central to NVIDIA's business.
Collaborate with other team members, teams, and/or external researchers.
Transfer your research to product groups to enable new products or types of products. Deliverable results include prototypes, patents, products, and/or publishing original research.
What we need to see:
Must be actively enrolled in a university pursuing a Ph.D. degree in Computer Science, Electrical Engineering, or a related field, for the full duration of the internship;anticipated graduation date (month and year)must be clearly indicated on a resume or CV to be considered.
Depending on the internship, prior experience or knowledge requirements couldinclude the following programming skills and technologies:
C, C++, Python, CUDA.
Strong background in research with publications at top conferences.
Excellent communication and collaboration skills.
Potential internships require research experience in at least one of the following areas:
Chip-level and System-levelArchitecture
GPU and Multi-GPU Architecture
Scalable memory systemsand new memory technologies
Scalable on-chip and off-chip interconnects
Chip-level and system-level scheduling
Power, performance, and energy-efficiency in large-scale systems
Specialized accelerators for workloads like AI algorithms, crypto algorithms, databases, etc.
Hardware-software co-design
Systems for AI/ML
Systems Infrastructure for large LLM training and inference
Systems/AI algorithms codesign (e.g., for sparsity)
AI/ML for systems (hardware design, code optimization, etc.)
ML for EDA
Programming Systems
GPU-accelerated algorithms
Languages and programming models for parallel computing
Optimizingcompilers and AI-based performance assistants
Distributed runtime systems
Systems software and operating system interfaces
OptimizingGPU-accelerated workloads
Compilersand code verification
High-Performance Networking and Interconnects
Large-scale GPU networking
Topologies, routing, and congestion control
Networking techniques at the intersection of scale-out and scale-up
VLSI and Electronic Design Automation (EDA)
GPU Accelerated EDA
Clickhereto learn more about NVIDIA, our early talent programs, benefits offered to studentsand other helpful student resources related to our latest technologies and endeavors.
You will also be eligible for Internbenefits.
Applications are accepted on an ongoing basis.This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering an inclusive work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.About Nvidia
Sourced by ZipRecruiter
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US