Progress towards a Bachelor's, Master's, or PhD degree in Computer Science, Engineering, or a ... Program details * 12-week paid internship * Generous housing support for those relocating * Daily ...
Quick apply
Progress towards a Bachelor's, Master's, or PhD degree in Computer Science, Engineering, or a ... Program details * 12-week paid internship * Generous housing support for those relocating * Daily ...
Engineering Intern ENMW25051
Lexington Park, MD · On-site
$20 - $26/hr
Accepted by or currently working towards a bachelor's degree in one of the following majors (at the start of the internship): * Computer Science * Computer Engineering * Electrical Engineering
Engineering Intern ENMW25051
Lexington Park, MD · On-site
$20 - $26/hr
Accepted by or currently working towards a bachelor's degree in one of the following majors (at the start of the internship): * Computer Science * Computer Engineering * Electrical Engineering
Progress towards a Bachelor's, Master's, or PhD degree in Computer Science, Engineering, or a ... Program details * 12-week paid internship * Generous housing support for those relocating * Daily ...
Progress towards a Bachelor's, Master's, or PhD degree in Computer Science, Engineering, or a ... Program details * 12-week paid internship * Generous housing support for those relocating * Daily ...
Computer Science Internship - Fall 2026 SOFWERX is a venue operated under an agreement between the ... The internship program is administered by USF Institute of Applied Engineering. Upon hire, you will ...
Computer Science Internship - Fall 2026 SOFWERX is a venue operated under an agreement between the ... The internship program is administered by USF Institute of Applied Engineering. Upon hire, you will ...
CAD Engineer - Signoff Infrastructure
$129K - $194K/yr
... chip design, VLSI, or CAD tools Interest in AI/ML technologies Personal projects or internships ... engineering best practices including version control, testing, and CI/CD BS in Computer Science or ...
CAD Engineer - Signoff Infrastructure
$129K - $194K/yr
... chip design, VLSI, or CAD tools Interest in AI/ML technologies Personal projects or internships ... engineering best practices including version control, testing, and CI/CD BS in Computer Science or ...
CAD Engineer - Signoff Infrastructure
$129K - $194K/yr
... chip design, VLSI, or CAD tools Interest in AI/ML technologies Personal projects or internships ... engineering best practices including version control, testing, and CI/CD BS in Computer Science or ...
CAD Engineer - Signoff Infrastructure
$129K - $194K/yr
... chip design, VLSI, or CAD tools Interest in AI/ML technologies Personal projects or internships ... engineering best practices including version control, testing, and CI/CD BS in Computer Science or ...
Digital IC Design Engineer Intern
South San Francisco, CA · On-site
$35/hr
... chip (SoC) for high-bandwidth brain-computer interfaces. We have crafted a team of exceptional ... Temporary Employees & Interns excluded
Digital IC Design Engineer Intern
South San Francisco, CA · On-site
$35/hr
... chip (SoC) for high-bandwidth brain-computer interfaces. We have crafted a team of exceptional ... Temporary Employees & Interns excluded
Chip Package Signal and Power Integrity Engineer
Sunnyvale, CA · On-site
$196K/yr
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. * 10 years of experience with SI/PI design for chip ...
Chip Package Signal and Power Integrity Engineer
Sunnyvale, CA · On-site
$196K/yr
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field, or equivalent practical experience. * 10 years of experience with SI/PI design for chip ...
Software Engineer
Palo Alto, CA · On-site
$160K - $240K/yr
What You'll Do * Build and optimize our full-stack developer platform for chip engineers using ... Education: BS/MS in Computer Science, Software Engineering, Mathematics or a related field. Core ...
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Software Engineer
Palo Alto, CA · On-site
$160K - $240K/yr
What You'll Do * Build and optimize our full-stack developer platform for chip engineers using ... Education: BS/MS in Computer Science, Software Engineering, Mathematics or a related field. Core ...
Analog IC Layout Engineer
South San Francisco, CA · On-site
$83K - $139K/yr
... chip (SoC) for high-bandwidth brain-computer interfaces. We have crafted a team of exceptional ... Temporary Employees & Interns excluded
Analog IC Layout Engineer
South San Francisco, CA · On-site
$83K - $139K/yr
... chip (SoC) for high-bandwidth brain-computer interfaces. We have crafted a team of exceptional ... Temporary Employees & Interns excluded
Apple's Silicon Engineering Group (SEG) is hiring hardworking engineers for CPU block-level ... CAD teams during the entire chip design cycle to drive signoff closure for tapeout • Work with ...
Apple's Silicon Engineering Group (SEG) is hiring hardworking engineers for CPU block-level ... CAD teams during the entire chip design cycle to drive signoff closure for tapeout • Work with ...
Apple's Silicon Engineering Group (SEG) is hiring hardworking engineers for CPU block-level ... CAD teams during the entire chip design cycle to drive signoff closure for tapeout • Work with ...
Apple's Silicon Engineering Group (SEG) is hiring hardworking engineers for CPU block-level ... CAD teams during the entire chip design cycle to drive signoff closure for tapeout • Work with ...
CAD Engineer - PDV
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
CAD Engineer - PDV
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
We're seeking a CAD Engineer to join our team and develop full-stack web applications that power ... Signoff is the critical final verification stage in chip design where designs are validated against ...
We're seeking a CAD Engineer to join our team and develop full-stack web applications that power ... Signoff is the critical final verification stage in chip design where designs are validated against ...
Digital IC Design Engineer
Austin, TX · On-site
$116K - $233K/yr
Team Description: The Brain Interfaces Soc Department delivers chip architecture and silicon ... S.) degree in Electrical Engineering and/or Computer Science or a related field, or equivalent ...
Digital IC Design Engineer
Austin, TX · On-site
$116K - $233K/yr
Team Description: The Brain Interfaces Soc Department delivers chip architecture and silicon ... S.) degree in Electrical Engineering and/or Computer Science or a related field, or equivalent ...
... Engineer to develop and support infrastructure tools for chip design and verification processes ... and computer science theory • Experienced with VLSI frontend design and verification • ...
... Engineer to develop and support infrastructure tools for chip design and verification processes ... and computer science theory • Experienced with VLSI frontend design and verification • ...
CAD Engineer - PDV
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
CAD Engineer - PDV
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
CAD Engineer - PDV
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
CAD Engineer - PDV
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
Senior Mechanical Engineer
Fremont, CA · On-site
$120K - $150K/yr
Description We are seeking a Sr. Mechanical Design Engineer to join our multi-disciplinary team ... computer chip built in the world. Nova dives deep into dimensions and layers at the atomic level to ...
Senior Mechanical Engineer
Fremont, CA · On-site
$120K - $150K/yr
Description We are seeking a Sr. Mechanical Design Engineer to join our multi-disciplinary team ... computer chip built in the world. Nova dives deep into dimensions and layers at the atomic level to ...
DMTS Digital Design Engineer / Chip Lead
$206K - $410K/yr
Basic Qualifications * BS, MS, or PhD in Electrical Engineering, Computer Engineering, or related field * 10+ years of ASIC/digital design experience with at least one prior tape-out in a chip lead ...
DMTS Digital Design Engineer / Chip Lead
$206K - $410K/yr
Basic Qualifications * BS, MS, or PhD in Electrical Engineering, Computer Engineering, or related field * 10+ years of ASIC/digital design experience with at least one prior tape-out in a chip lead ...
Internship Computer Chip Engineer information
See salary details
$11.06 - $12.74
2% of jobs
$12.74 - $14.42
4% of jobs
$16.11 is the 25th percentile. Wages below this are outliers.
$14.42 - $16.11
19% of jobs
$16.11 - $17.79
24% of jobs
The median wage is $17.89 / hr.
$17.79 - $19.47
17% of jobs
$20.48 is the 75th percentile. Wages above this are outliers.
$19.47 - $21.15
16% of jobs
$21.15 - $22.84
6% of jobs
$22.84 - $24.52
5% of jobs
$24.52 - $26.20
3% of jobs
$26.20 - $27.88
3% of jobs
$27.88 - $29.57
1% of jobs
$11
$19
$29
How much do internship computer chip engineer jobs pay per hour?
As of Jul 22, 2026, the average hourly pay for internship computer chip engineer in the United States is $19.31, according to ZipRecruiter salary data. Most workers in this role earn between $16.11 and $20.91 per hour, depending on experience, location, and employer.
What is the difference between Internship Computer Chip Engineer vs Entry-Level Computer Chip Engineer?
| Aspect | Internship Computer Chip Engineer | Entry-Level Computer Chip Engineer |
|---|---|---|
| Qualifications | Currently enrolled or recent graduate, some coursework in electrical engineering or computer engineering | Bachelor's degree in electrical/computer engineering or related field |
| Work Environment | Internship programs, supervised tasks, learning-focused | Full-time professional role, project responsibilities |
| Employer & Industry | Tech companies, semiconductor firms, research labs | Semiconductor companies, tech firms, manufacturing |
Internship Computer Chip Engineers are students or recent graduates gaining hands-on experience, often part-time or temporary. Entry-Level Computer Chip Engineers are full-time professionals responsible for designing and testing chips. Internships serve as a stepping stone, while entry-level roles involve more responsibility and independence in the industry.
More about Internship Computer Chip Engineer jobs
What cities are hiring for Internship Computer Chip Engineer jobs? Cities with the most Internship Computer Chip Engineer job openings:
What are the most commonly searched types of Computer Chip Engineer jobs? The most popular types of Computer Chip Engineer jobs are:
What states have the most Internship Computer Chip Engineer jobs? States with the most job openings for Internship Computer Chip Engineer jobs include:
What job categories do people searching Internship Computer Chip Engineer jobs look for? The top searched job categories for Internship Computer Chip Engineer jobs are:
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Posted 26 days ago
Job description
About Etched
Etched is building hardware for frontier intelligence. We co-design chips, racks, software, and manufacturing to deliver best-in-class throughput and latency across both prefill and decode workloads. Our first products are heavily focused on inference. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
The roles
Our chip simulation and tooling role will co-design, develop, and test simulations of our custom hardware and tools that engineers use to analyze those systems. You will be working at the cutting edge of hardware innovation, closely coordinating with both software and hardware teams across their whole development path. We are looking for Fall '26, Spring '27, and Summer '27 interns.
You may be a good fit if you have
Progress towards a Bachelor’s, Master’s, or PhD degree in Computer Science, Engineering, or a related technical field.
Proficiency in C/C++ or Rust
Strong fundamentals in data structures and algorithms
Strong understanding of low-level software engineering
Strong understanding of hardware/software co-design
Excellent communication and collaboration skills
Strong candidates may also have (Nice to have qualifications)
Experience with Linux internals, kernel development, or driver debugging
Experience with hardware diagnostics or interpreting hardware logs
Exposure to server virtualization or CI/CD pipelines
Experience with Rust or embedded development
We encourage you to apply even if you do not believe you meet every qualification.
Program details
12-week paid internship
Generous housing support for those relocating
Daily lunch and dinner in our office
Based at our office in San Jose, CA
Direct mentorship from industry leaders and world-class engineers
Opportunity to work on one of the most important problems of our time
For any questions, contact internships@etched.com
How we’re different
Etched believes in the Bitter Lesson. We are the first inference-focused frontier AI system, betting early on transformer and transformer-like architectures and on increasing model sizes. Our addressable market is the entirety of inference, unlike many of our competitors.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both and work across disciplines as needed.