Progress towards a Bachelor's, Master's, or PhD degree in Computer Science, Engineering, or a ... Program details * 12-week paid internship * Generous housing support for those relocating * Daily ...
Progress towards a Bachelor's, Master's, or PhD degree in Computer Science, Engineering, or a ... Program details * 12-week paid internship * Generous housing support for those relocating * Daily ...
Digital IC Design Engineer Intern
Fremont, CA · On-site
$35/hr
... chip (SoC) for high-bandwidth brain-computer interfaces. We have crafted a team of exceptional ... Temporary Employees & Interns excluded
Digital IC Design Engineer Intern
Fremont, CA · On-site
$35/hr
... chip (SoC) for high-bandwidth brain-computer interfaces. We have crafted a team of exceptional ... Temporary Employees & Interns excluded
Software Engineer
Palo Alto, CA · On-site
$160K - $240K/yr
What You'll Do * Build and optimize our full-stack developer platform for chip engineers using ... Education: BS/MS in Computer Science, Software Engineering, Mathematics or a related field. Core ...
Quick apply
Software Engineer
Palo Alto, CA · On-site
$160K - $240K/yr
What You'll Do * Build and optimize our full-stack developer platform for chip engineers using ... Education: BS/MS in Computer Science, Software Engineering, Mathematics or a related field. Core ...
CAD Engineer - PDV
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
CAD Engineer - PDV
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
CAD Engineer - PDV
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
CAD Engineer - PDV
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
What You'll Do * Build and optimize our full-stack developer platform for chip engineers using ... Requirements Education: BS/MS in Computer Science, Software Engineering, Mathematics or a related ...
What You'll Do * Build and optimize our full-stack developer platform for chip engineers using ... Requirements Education: BS/MS in Computer Science, Software Engineering, Mathematics or a related ...
Analog IC Layout Engineer
Fremont, CA · On-site
$83K - $139K/yr
... chip (SoC) for high-bandwidth brain-computer interfaces. We have crafted a team of exceptional ... Temporary Employees & Interns excluded
Analog IC Layout Engineer
Fremont, CA · On-site
$83K - $139K/yr
... chip (SoC) for high-bandwidth brain-computer interfaces. We have crafted a team of exceptional ... Temporary Employees & Interns excluded
CAD Engineer - PDV
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
CAD Engineer - PDV
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
CAD Engineer - PDV
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
CAD Engineer - PDV
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
We're seeking a CAD Engineer to join our team and develop full-stack web applications that power ... Signoff is the critical final verification stage in chip design where designs are validated against ...
We're seeking a CAD Engineer to join our team and develop full-stack web applications that power ... Signoff is the critical final verification stage in chip design where designs are validated against ...
CAD Engineer - PDV
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
CAD Engineer - PDV
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
AI Infrastructure Operations Engineer
Sunnyvale, CA · On-site
$126K - $165K/yr
... programming simplicity of a single device. This approach allows Cerebras to deliver industry ... computer chip, the Wafer-Scale Engine (WSE), and the systems that harness its unparalleled power.
AI Infrastructure Operations Engineer
Sunnyvale, CA · On-site
$126K - $165K/yr
... programming simplicity of a single device. This approach allows Cerebras to deliver industry ... computer chip, the Wafer-Scale Engine (WSE), and the systems that harness its unparalleled power.
CAD Engineer - PDV
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
CAD Engineer - PDV
Austin, TX · On-site
... chip (SoC). You'll ensure Apple products and services can seamlessly and efficiently handle the ... As a member of our CAD team, you will architect, develop, maintain and improve physical design ...
Digital IC Design Engineer
Austin, TX · On-site
$116K - $233K/yr
Team Description: The Brain Interfaces Soc Department delivers chip architecture and silicon ... S.) degree in Electrical Engineering and/or Computer Science or a related field, or equivalent ...
Digital IC Design Engineer
Austin, TX · On-site
$116K - $233K/yr
Team Description: The Brain Interfaces Soc Department delivers chip architecture and silicon ... S.) degree in Electrical Engineering and/or Computer Science or a related field, or equivalent ...
DMTS Digital Design Engineer / Chip Lead
$206K - $410K/yr
Basic Qualifications * BS, MS, or PhD in Electrical Engineering, Computer Engineering, or related field * 10+ years of ASIC/digital design experience with at least one prior tape-out in a chip lead ...
DMTS Digital Design Engineer / Chip Lead
$206K - $410K/yr
Basic Qualifications * BS, MS, or PhD in Electrical Engineering, Computer Engineering, or related field * 10+ years of ASIC/digital design experience with at least one prior tape-out in a chip lead ...
DMTS Digital Design Engineer / Chip Lead
$206K - $410K/yr
Basic Qualifications * BS, MS, or PhD in Electrical Engineering, Computer Engineering, or related field * 10+ years of ASIC/digital design experience with at least one prior tape-out in a chip lead ...
DMTS Digital Design Engineer / Chip Lead
$206K - $410K/yr
Basic Qualifications * BS, MS, or PhD in Electrical Engineering, Computer Engineering, or related field * 10+ years of ASIC/digital design experience with at least one prior tape-out in a chip lead ...
DMTS Digital Design Engineer / Chip Lead
Minneapolis, MN · On-site
$206K - $410K/yr
Basic Qualifications * BS, MS, or PhD in Electrical Engineering, Computer Engineering, or related field * 10+ years of ASIC/digital design experience with at least one prior tape-out in a chip lead ...
DMTS Digital Design Engineer / Chip Lead
Minneapolis, MN · On-site
$206K - $410K/yr
Basic Qualifications * BS, MS, or PhD in Electrical Engineering, Computer Engineering, or related field * 10+ years of ASIC/digital design experience with at least one prior tape-out in a chip lead ...
SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... Bachelor's degree in electrical engineering, computer engineering or computer science * 5+ years of ...
SR. FULL CHIP PHYSICAL VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... Bachelor's degree in electrical engineering, computer engineering or computer science * 5+ years of ...
Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience. * 4 years of technical experience in silicon timing closure and chip integration. * Experience in ...
Bachelor's degree in Electrical Engineering or Computer Science, or equivalent practical experience. * 4 years of technical experience in silicon timing closure and chip integration. * Experience in ...
DMTS Digital Design Engineer / Chip Lead
$206K - $410K/yr
Basic Qualifications * BS, MS, or PhD in Electrical Engineering, Computer Engineering, or related field * 10+ years of ASIC/digital design experience with at least one prior tape-out in a chip lead ...
DMTS Digital Design Engineer / Chip Lead
$206K - $410K/yr
Basic Qualifications * BS, MS, or PhD in Electrical Engineering, Computer Engineering, or related field * 10+ years of ASIC/digital design experience with at least one prior tape-out in a chip lead ...
Internship Computer Chip Engineer information
See salary details
$11.06 - $12.74
2% of jobs
$12.74 - $14.42
4% of jobs
$16.11 is the 25th percentile. Wages below this are outliers.
$14.42 - $16.11
19% of jobs
$16.11 - $17.79
24% of jobs
The median wage is $17.89 / hr.
$17.79 - $19.47
17% of jobs
$20.48 is the 75th percentile. Wages above this are outliers.
$19.47 - $21.15
16% of jobs
$21.15 - $22.84
6% of jobs
$22.84 - $24.52
5% of jobs
$24.52 - $26.20
3% of jobs
$26.20 - $27.88
3% of jobs
$27.88 - $29.57
1% of jobs
$11
$19
$29
How much do internship computer chip engineer jobs pay per hour?
As of Jun 10, 2026, the average hourly pay for internship computer chip engineer in the United States is $19.31, according to ZipRecruiter salary data. Most workers in this role earn between $16.11 and $20.91 per hour, depending on experience, location, and employer.
What is the difference between Internship Computer Chip Engineer vs Entry-Level Computer Chip Engineer?
| Aspect | Internship Computer Chip Engineer | Entry-Level Computer Chip Engineer |
|---|---|---|
| Qualifications | Currently enrolled or recent graduate, some coursework in electrical engineering or computer engineering | Bachelor's degree in electrical/computer engineering or related field |
| Work Environment | Internship programs, supervised tasks, learning-focused | Full-time professional role, project responsibilities |
| Employer & Industry | Tech companies, semiconductor firms, research labs | Semiconductor companies, tech firms, manufacturing |
Internship Computer Chip Engineers are students or recent graduates gaining hands-on experience, often part-time or temporary. Entry-Level Computer Chip Engineers are full-time professionals responsible for designing and testing chips. Internships serve as a stepping stone, while entry-level roles involve more responsibility and independence in the industry.
More about Internship Computer Chip Engineer jobs
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What states have the most Internship Computer Chip Engineer jobs? States with the most job openings for Internship Computer Chip Engineer jobs include:
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Internship
Posted 21 days ago
Job description
About Etched
Etched is building the world's first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
The roles
Our chip simulation and tooling role will co-design, develop, and test simulations of our custom hardware and tools that engineers use to analyze those systems. You will be working at the cutting edge of hardware innovation, closely coordinating with both software and hardware teams across their whole development path. We are looking for Fall '26, Spring '27, and Summer '27 interns.
You may be a good fit if you have
Strong candidates may also have (Nice to have qualifications)
We encourage you to apply even if you do not believe you meet every qualification.
Program details
For any questions, contact internships@etched.com
How we're different
Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.
Etched is building the world's first AI inference system purpose-built for transformers - delivering over 10x higher performance and dramatically lower cost and latency than a B200. With Etched ASICs, you can build products that would be impossible with GPUs, like real-time video generation models and extremely deep & parallel chain-of-thought reasoning agents. Backed by hundreds of millions from top-tier investors and staffed by leading engineers, Etched is redefining the infrastructure layer for the fastest growing industry in history.
The roles
Our chip simulation and tooling role will co-design, develop, and test simulations of our custom hardware and tools that engineers use to analyze those systems. You will be working at the cutting edge of hardware innovation, closely coordinating with both software and hardware teams across their whole development path. We are looking for Fall '26, Spring '27, and Summer '27 interns.
You may be a good fit if you have
- Progress towards a Bachelor's, Master's, or PhD degree in Computer Science, Engineering, or a related technical field.
- Proficiency in C/C++ or Rust
- Strong fundamentals in data structures and algorithms
- Strong understanding of low-level software engineering
- Strong understanding of hardware/software co-design
- Excellent communication and collaboration skills
Strong candidates may also have (Nice to have qualifications)
- Experience with Linux internals, kernel development, or driver debugging
- Experience with hardware diagnostics or interpreting hardware logs
- Exposure to server virtualization or CI/CD pipelines
- Experience with Rust or embedded development
We encourage you to apply even if you do not believe you meet every qualification.
Program details
- 12-week paid internship
- Generous housing support for those relocating
- Daily lunch and dinner in our office
- Based at our office in San Jose, CA
- Direct mentorship from industry leaders and world-class engineers
- Opportunity to work on one of the most important problems of our time
For any questions, contact internships@etched.com
How we're different
Etched believes in the Bitter Lesson. We think most of the progress in the AI field has come from using more FLOPs to train and run models, and the best way to get more FLOPs is to build model-specific hardware. Larger and larger training runs encourage companies to consolidate around fewer model architectures, which creates a market for single-model ASICs.
We are a fully in-person team in San Jose (Santana Row), and greatly value engineering skills. We do not have boundaries between engineering and research, and we expect all of our technical staff to contribute to both as needed.