Physical Design Engineer
$134K - $138K/yr
Setup and Synthesizing RTL * Timing closure through various methods and strategies; preferable in ... Collaborating with IC Design RTL Engineers * Must work in person at our Colorado Springs site - no ...
$134K - $138K/yr
Setup and Synthesizing RTL * Timing closure through various methods and strategies; preferable in ... Collaborating with IC Design RTL Engineers * Must work in person at our Colorado Springs site - no ...
$134K - $138K/yr
Setup and Synthesizing RTL * Timing closure through various methods and strategies; preferable in ... Collaborating with IC Design RTL Engineers * Must work in person at our Colorado Springs site - no ...
Fort Collins, CO · On-site
$134K - $164K/yr
Lead ASIC Design Verification Engineer We are seeking a highly experienced and visionary Lead ... ASIC design verification (preferred). * Methodologies: Deep fluency in RTL verification ...
Fort Collins, CO · On-site
$134K - $164K/yr
Lead ASIC Design Verification Engineer We are seeking a highly experienced and visionary Lead ... ASIC design verification (preferred). * Methodologies: Deep fluency in RTL verification ...
Fort Collins, CO · On-site
$134K - $164K/yr
Lead ASIC Design Verification Engineer We are seeking a highly experienced and visionary Lead ... ASIC design verification (preferred). * Methodologies: Deep fluency in RTL verification ...
Fort Collins, CO · On-site
$134K - $164K/yr
Lead ASIC Design Verification Engineer We are seeking a highly experienced and visionary Lead ... ASIC design verification (preferred). * Methodologies: Deep fluency in RTL verification ...
Littleton, CO · On-site
$100/hr
Job #216852 Chipton-Ross is seeking an FPGA Design Engineer for a contract opportunity in Littleton ... ASIC/FPGA verification experience with modern verification methodologies such as UVM, OVM or VMM ...
Littleton, CO · On-site
$100/hr
Job #216852 Chipton-Ross is seeking an FPGA Design Engineer for a contract opportunity in Littleton ... ASIC/FPGA verification experience with modern verification methodologies such as UVM, OVM or VMM ...
Fort Collins, CO · On-site
$143K - $230K/yr
Are you a versatile, senior engineer capable of leading external and internal cross-functional ... Logic design, chip architecture, microarchitecture, Verilog RTL coding Front-end logic design ...
Fort Collins, CO · On-site
$143K - $230K/yr
Are you a versatile, senior engineer capable of leading external and internal cross-functional ... Logic design, chip architecture, microarchitecture, Verilog RTL coding Front-end logic design ...
Englewood, CO · Hybrid
$130K - $200K/yr
Work on both ASIC and FPGA Space system projects Requirements * 7+ years of relevant design ... RTL Design experience * Experience validating designs for Space Applications Benefits * Competitive ...
Englewood, CO · Hybrid
$130K - $200K/yr
Work on both ASIC and FPGA Space system projects Requirements * 7+ years of relevant design ... RTL Design experience * Experience validating designs for Space Applications Benefits * Competitive ...
Englewood, CO · Hybrid
$130K - $200K/yr
Work on both ASIC and FPGA Space system projects Requirements * 7+ years of relevant design ... RTL Design experience * Experience validating designs for Space Applications Benefits * Competitive ...
Englewood, CO · Hybrid
$130K - $200K/yr
Work on both ASIC and FPGA Space system projects Requirements * 7+ years of relevant design ... RTL Design experience * Experience validating designs for Space Applications Benefits * Competitive ...
Fort Collins, CO · On-site
$134K/yr
Experience: 8+ years of professional digital ASIC design experience. * RTL Mastery: Deep expertise in writing robust, synthesizable SystemVerilog RTL * Process Nodes: Direct experience with advanced ...
Fort Collins, CO · On-site
$134K/yr
Experience: 8+ years of professional digital ASIC design experience. * RTL Mastery: Deep expertise in writing robust, synthesizable SystemVerilog RTL * Process Nodes: Direct experience with advanced ...
Fort Collins, CO · On-site
$143K - $230K/yr
Are you a versatile, senior engineer capable of leading external and internal cross-functional ... Logic design, chip architecture, microarchitecture, Verilog RTL coding Front-end logic design ...
Fort Collins, CO · On-site
$143K - $230K/yr
Are you a versatile, senior engineer capable of leading external and internal cross-functional ... Logic design, chip architecture, microarchitecture, Verilog RTL coding Front-end logic design ...
Fort Collins, CO · On-site
$134K/yr
Experience: 8+ years of professional digital ASIC design experience. * RTL Mastery: Deep expertise in writing robust, synthesizable SystemVerilog RTL * Process Nodes: Direct experience with advanced ...
Fort Collins, CO · On-site
$134K/yr
Experience: 8+ years of professional digital ASIC design experience. * RTL Mastery: Deep expertise in writing robust, synthesizable SystemVerilog RTL * Process Nodes: Direct experience with advanced ...
Highlands Ranch, CO · On-site +1
$126K - $174K/yr
As an ASIC & FPGA Associate Engineering Manager , you will lead and manage a team of ASIC/FPGA design and verification engineers in executing design services for programs in the integration and test ...
Highlands Ranch, CO · On-site +1
$126K - $174K/yr
As an ASIC & FPGA Associate Engineering Manager , you will lead and manage a team of ASIC/FPGA design and verification engineers in executing design services for programs in the integration and test ...
$123K - $169K/yr
As an ASIC & FPGA Associate Engineering Manager , you will lead and manage a team of ASIC/FPGA design and verification engineers in executing design services for programs in the integration and test ...
$123K - $169K/yr
As an ASIC & FPGA Associate Engineering Manager , you will lead and manage a team of ASIC/FPGA design and verification engineers in executing design services for programs in the integration and test ...
Littleton, CO · On-site
$120K - $166K/yr
Chipton-Ross is seeking an FPGA Design Engineer for a contract opportunity in Littleton, CO. BASIC ... ASIC/FPGA verification experience with modern verification methodologies such as UVM, OVM or VMM ...
Littleton, CO · On-site
$120K - $166K/yr
Chipton-Ross is seeking an FPGA Design Engineer for a contract opportunity in Littleton, CO. BASIC ... ASIC/FPGA verification experience with modern verification methodologies such as UVM, OVM or VMM ...
Denver, CO · On-site
$126K - $174K/yr
As an ASIC & FPGA Associate Engineering Manager , you will lead and manage a team of ASIC/FPGA ... These solutions may leverage preexisting IP, internal products, new design, existing design ...
Denver, CO · On-site
$126K - $174K/yr
As an ASIC & FPGA Associate Engineering Manager , you will lead and manage a team of ASIC/FPGA ... These solutions may leverage preexisting IP, internal products, new design, existing design ...
Littleton, CO · On-site
$101K - $201K/yr
ASIC/FPGA Verification Engineer III Location: Denver, CO; Highlands Ranch, CO; King of Prussia, PA ... Work with an independent verification team and design engineers to define verification strategies ...
Littleton, CO · On-site
$101K - $201K/yr
ASIC/FPGA Verification Engineer III Location: Denver, CO; Highlands Ranch, CO; King of Prussia, PA ... Work with an independent verification team and design engineers to define verification strategies ...
Boulder, CO · On-site
$101K - $178K/yr
Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on ... RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform. Applicants ...
Boulder, CO · On-site
$101K - $178K/yr
Lockheed Martin Space is seeking a Field Programmable Gate Array (FPGA) Design Engineer to work on ... RTL design and High-Level Synthesis (HLS) methodologies within the Vitis platform. Applicants ...
$120K - $150K/yr
Help debug ASIC/FPGA design and/or test issues * Prepare materials for peer reviews and major ... Benefits Include: (Please note, Interns are not eligible for benefits) * Unlimited PTO - Vacation ...
Quick apply
$120K - $150K/yr
Help debug ASIC/FPGA design and/or test issues * Prepare materials for peer reviews and major ... Benefits Include: (Please note, Interns are not eligible for benefits) * Unlimited PTO - Vacation ...
Fort Collins, CO · On-site
$141K - $226K/yr
Overall design responsibility for ASIC package designs, including aspects of signal integrity ... General flip-chip BGA package design & engineering * Project management and customer interface for ...
Fort Collins, CO · On-site
$141K - $226K/yr
Overall design responsibility for ASIC package designs, including aspects of signal integrity ... General flip-chip BGA package design & engineering * Project management and customer interface for ...
Fort Collins, CO · On-site
$134K/yr
Overall design responsibility for ASIC package designs, including aspects of signal integrity ... General flip-chip BGA package design & engineering * Project management and customer interface for ...
Fort Collins, CO · On-site
$134K/yr
Overall design responsibility for ASIC package designs, including aspects of signal integrity ... General flip-chip BGA package design & engineering * Project management and customer interface for ...
Littleton, CO · On-site
... ASIC-based image processing algorithms. * Experience in both creating IP from scratch in RTL and ... PCB design and schematic capture and layout with tools such as Altium Designer. * Active TS/SCI ...
Littleton, CO · On-site
... ASIC-based image processing algorithms. * Experience in both creating IP from scratch in RTL and ... PCB design and schematic capture and layout with tools such as Altium Designer. * Active TS/SCI ...
| Aspect | Internship Asic Rtl Design Engineer | Asic Verification Engineer |
|---|---|---|
| Credentials | Typically pursuing or recently completed a degree in Electrical Engineering or Computer Engineering | Similar educational background, often with additional coursework in verification methodologies |
| Work Environment | Internship setting, supervised, focused on learning and assisting in RTL design tasks | Full-time role, focused on testing and verifying RTL designs |
| Industry Usage | Used in semiconductor and chip design companies during early career stages | Common in companies developing complex integrated circuits and chips |
The Internship Asic Rtl Design Engineer focuses on assisting in RTL design tasks during an internship, emphasizing learning and support. In contrast, the Asic Verification Engineer is responsible for verifying RTL designs to ensure functionality. Both roles require similar educational backgrounds but differ in responsibilities and work environment, with verification roles being more advanced and permanent.

$134K - $138K/yr
Full-time
Medical, Dental, Vision, Retirement, PTO
Posted 16 days ago
8.7
Based on 23 frontline employees who took The Breakroom Quiz
19th of 156 rated electronics manufacturers
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Job Description:Broadcom is searching for a Physical IC Design Engineer to join the Data Center Solutions Group at our main campus in Colorado Springs, Colorado. This position involves working with the latest technology to continue driving next generation AI/ML ecosystems through our PCIe Switch Products - and managing mega datacenters, while leading world class performance, through our Enterprise Storage Products.More specifically, this position will require in-depth knowledge and expertise in all Physical Design aspects of taking RTL to silicon tape-out.
Responsibilities include, but are not limited to the following:
Execution of Physical Design, Synthesis, Physical Verification, and Timing Closure
Setup and Synthesizing RTL
Timing closure through various methods and strategies; preferable in-depth experience in top-level STA
EM/IR Analysis,
Place and Route
Clock Tree Synthesis; experience with custom clock trees, insertion reduction and skew balancing techniques
Floor-planning and Layout; preferable in-depth experience in top-level floorplanning
Flow and Methodology Development
Collaborating with IC Design RTL Engineers
Must work in person at our Colorado Springs site - no remote work allowed.
Required attributes:
TCL/PERL Scripting
Proficiency in related EDA Tools
Full physical design cycle experience: RTL to Tape-out
Excellent verbal and written communication skills
Education and Experience Requirements:
Minimum: Bachelor's degree required in Electrical Engineering or Electronics Engineering
12+ Years of relevant experience
Compensation and Benefits
As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.
If you are located outside USA, please be sure to fill out a home address as this will be used for future correspondence.
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Semiconductor and electronic component manufacturing
10,000+ Employees
Palo Alto, CA, US
1991