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Full Time Asic Rtl Design Engineer Jobs in Chicago, IL

EN Engineering LLC

Mechanical Design Engineer II

Chicago, IL · Remote

$78K - $106K/yr

ENTRUST Solutions Group is seeking a dynamic Design Engineer II to join our team. In this role, you ... Full-time employees are eligible to earn PTO hours. May be eligible for discretionary bonus as ...

EN Engineering LLC

Mechanical Design Engineer II

Lisle, IL · Remote

$74K - $101K/yr

ENTRUST Solutions Group is seeking a dynamic Design Engineer II to join our team. In this role, you ... Full-time employees are eligible to earn PTO hours. May be eligible for discretionary bonus as ...

Panduit

Fiber Optics Design Engineer

Tinley Park, IL · On-site

$80K - $100K/yr

The Fiber Optics Design Engineer will drive the design and development of innovative fiber optic ... Applicants must be currently authorized to work in the United States on a full-time basis. Panduit ...

Panduit

Fiber Optics Design Engineer

Tinley Park, IL · On-site

$80K - $100K/yr

The Fiber Optics Design Engineer will drive the design and development of innovative fiber optic ... Applicants must be currently authorized to work in the United States on a full-time basis. Panduit ...

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All JobsAsic Rtl Design Engineer JobsFull Time Asic Rtl Design Engineer JobsFull Time Asic Rtl Design Engineer Jobs in Chicago, IL

Full Time Asic Rtl Design Engineer information

See Chicago, IL salary details

$96.8K

$154.7K

$208.1K

How much do full time asic rtl design engineer jobs pay per year?

As of Aug 10, 2026, the average yearly pay for full time asic rtl design engineer in Chicago, IL is $154,723.00, according to ZipRecruiter salary data. Most workers in this role earn between $135,500.00 and $185,400.00 per year, depending on experience, location, and employer.

What is a full time ASIC RTL design engineer?

Full Time ASIC RTL Design Engineers are professionals who specialize in designing digital circuits at the Register Transfer Level (RTL) for Application Specific Integrated Circuits (ASICs). They use hardware description languages like Verilog or VHDL to create, simulate, and verify complex digital systems that are manufactured as custom chips. Their work typically involves collaborating with other engineers to optimize performance, area, and power consumption, as well as ensuring that the design meets specified requirements. These engineers play a crucial role in the development of chips used in various applications, including consumer electronics, automotive systems, and telecommunications.

How much does a full time ASIC RTL design engineer make?

A full-time ASIC RTL design engineer typically earns between $100,000 and $150,000 annually, depending on experience, location, and company size. Senior engineers with specialized skills in hardware description languages like Verilog or VHDL may earn higher salaries, often exceeding $160,000.

What are the key skills and qualifications needed to thrive as a full time ASIC RTL design engineer, and why are they important?

To thrive as a Full Time ASIC RTL Design Engineer, you need a solid background in digital logic design, computer architecture, and proficiency in Hardware Description Languages (HDLs) like Verilog or VHDL, typically supported by a degree in electrical or computer engineering. Familiarity with EDA tools such as Synopsys, Cadence, or Mentor Graphics, and knowledge of simulation, synthesis, and timing analysis, are crucial, with some roles requiring verification or DFT experience. Strong analytical thinking, attention to detail, and effective communication skills set exceptional engineers apart in team environments. These skills and qualities are essential for creating reliable, efficient hardware designs and ensuring successful silicon implementations in a competitive technology landscape.

Are full time ASIC RTL design engineers in demand?

Full-time ASIC RTL design engineers are in high demand due to the growth of semiconductor and electronics industries, requiring expertise in hardware description languages like Verilog and VHDL. Companies seek professionals skilled in RTL design, verification, and FPGA prototyping to develop advanced integrated circuits for various applications.

What are some common challenges full time ASIC RTL design engineers face when collaborating with verification teams?

A common challenge for ASIC RTL Design Engineers is ensuring that the design specifications are interpreted consistently between design and verification teams. Misalignment can lead to time-consuming bug fixes and delays in the project schedule. Effective communication, regular design reviews, and close collaboration are vital to catching issues early and maintaining project momentum. Additionally, engineers must often adapt quickly to evolving requirements or last-minute changes, which requires flexibility and strong problem-solving skills.

What is the salary of a full time ASIC RTL design engineer?

The average salary for a full-time ASIC RTL design engineer typically ranges from $100,000 to $150,000 annually, depending on experience, location, and company size. Senior engineers with specialized skills in hardware description languages like Verilog or VHDL and experience with FPGA or ASIC design may earn higher compensation. Benefits often include performance bonuses, health insurance, and opportunities for professional development.
What are the most commonly searched types of Asic Rtl Design Engineer jobs in Chicago, IL? The most popular types of Asic Rtl Design Engineer jobs in Chicago, IL are:
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Full Time Asic Rtl Design Engineer jobs near you
Infographic showing various Full Time Asic Rtl Design Engineer job openings in Chicago, IL as of August 2026, with employment types broken down into 1% Internship, 86% Full Time, 8% Part Time, and 5% Contract. Highlights an 85% Physical, 5% Hybrid, and 10% Remote job distribution, with an average salary of $154,723 per year, or $74.4 per hour.

Campus FPGA Engineer (Intern)

Jump Trading

Chicago, IL

$250K/yr

Full-time, Internship

Re-posted 2 days ago

Job description

Jump Trading Group is committed to world class research. We empower exceptional talents in Mathematics, Physics, and Computer Science to seek scientific boundaries, push through them, and apply cutting edge research to global financial markets. Our culture is unique. Constant innovation requires fearlessness, creativity, intellectual honesty, and a relentless competitive streak. We believe in winning together and unlocking unique individual talent by incenting collaboration and mutual respect. At Jump, research outcomes drive more than superior risk adjusted returns. We design, develop, and deploy technologies that change our world, fund start-ups across industries, and partner with leading global research organizations and universities to solve problems.

Core Development is a global team of technologists who lean into the cutting edge of agentic development to architect, build and maintain our world-class trading platform From optimizing our core trading engine to building custom hardware, we leverage the latest agentic tools to deliver the infrastructure that drives our trading and business needs.

What You'll Do:

We're looking for engineers to join our FPGA team that is building next-generation, ultra-low-latency systems to power trading with machine learning and other algorithms on a global scale. 

This is an opportunity to work on complex problems around networking, high performance computing, and real-time acceleration where we can't just use off-the-shelf hardware.

You'll work alongside a small team of experienced engineers who came to Jump from leading companies in FPGAs, semiconductors, networking cards, and more... as well as PhDs from top FPGA research labs around the world. 

Other duties as assigned or needed

Skills You'll Need:

  • Undergraduate or Graduate concentration in Electrical Engineering, Computer Science, or related areas 
  • Experience with FPGA or other hardware/systems design and development
  • Experience with RTL (SystemVerilog/Verilog/VHDL) 
  • Previous internship experience in hardware or low-level software engineering
  • Experience with C, C++, or Python
  • Passion for solving complex problems and ability to draw upon knowledge and experience from a variety of technical areas to produce extremely high-performance solutions
  • Reliable and predictable availability

Also Helpful, but Not Required:

  • lowRISC or RISC-V
  • CocoTB, Chisel, Opencore, or Bluespec
  • HLS or OpenCL 
  • Any programming close to the metal with CPU, GPU, microprocessors, etc.
  • Linux kernel and driver programming
  • Robotics, Telecommunications, or High Speed Networking 
  • Raspberry Pi or Arduino 
  • Excellent marks in courses such as computer architecture, digital design, design verification

* No finance or economics study or work experience required

INTERNATIONAL STUDENTS are encouraged to apply. We accept students eligible for CPT/OPT and we sponsor work visas for full-time positions.

The estimated base salary for this role is $250,000 per year.

Apply