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Freelance Asic Rtl Design Engineer Jobs in Seattle, WA

The Role We are seeking a Senior ASIC Physical Design Engineer to help implement advanced SoCs that ... RTL, verification, and packaging teams. You'll be a key contributor in achieving timing closure ...

FPGA Engineer, Amazon LEO OISL

Redmond, WA · On-site

$145K - $187K/yr

... RTL Design-Physical Implementation-Timing Closure-Simulation Validation- Lab Based Silicon ... with ASIC/FPGA design and verification tools - 3+ years of experience in ASIC/FPGA design ...

FPGA Engineer, Amazon LEO OISL

Redmond, WA · On-site

$145K - $187K/yr

... RTL Design-Physical Implementation-Timing Closure-Simulation Validation- Lab Based Silicon ... with ASIC/FPGA design and verification tools - 3+ years of experience in ASIC/FPGA design ...

Craft micro-architecture specification, implement in high-quality RTL, and deliver a fully verified ... Deep understanding of ASIC design flows and methodology * Strong analytical and interpersonal ...

Craft micro-architecture specification, implement in high-quality RTL, and deliver a fully verified ... Deep understanding of ASIC design flows and methodology Strong analytical and interpersonal skills ...

ASIC Engineer - Early Career

Seattle, WA · On-site

$129K - $180K/yr

Debug RTL and testbench issues with guidance from senior engineers * Document design intent, verification results, and test coverage Qualifications: * BS or MS in Electrical Engineering, Computer ...

ASIC Engineer - Early Career

Seattle, WA · On-site

$129K - $180K/yr

Debug RTL and testbench issues with guidance from senior engineers * Document design intent, verification results, and test coverage Qualifications: * BS or MS in Electrical Engineering, Computer ...

Showing results 21-40

Freelance Asic Rtl Design Engineer information

See Seattle, WA salary details

$16

$54

$150

How much do freelance asic rtl design engineer jobs pay per hour?

As of Sep 3, 2026, the average hourly pay for freelance asic rtl design engineer in Seattle, WA is $54.29, according to ZipRecruiter salary data. Most workers in this role earn between $27.64 and $70.29 per hour, depending on experience, location, and employer.

Are freelance ASIC RTL design engineers in demand?

Freelance ASIC RTL design engineers are in demand due to the growing need for custom chip development in industries like telecommunications, AI, and consumer electronics. Skills in hardware description languages such as Verilog or VHDL, along with experience in FPGA prototyping, enhance employability in this flexible work arrangement.

How much does a Freelance ASIC RTL Design Engineer make?

Freelance ASIC RTL Design Engineers typically earn between $50 and $150 per hour, depending on experience, project complexity, and location. Rates can vary based on expertise in hardware description languages like Verilog or VHDL and familiarity with FPGA or ASIC design tools.

What are the most commonly searched types of Asic Rtl Design Engineer jobs in Seattle, WA?

The most popular types of Asic Rtl Design Engineer jobs in Seattle, WA are:

What are popular job titles related to Freelance Asic Rtl Design Engineer jobs in Seattle, WA?

For Freelance Asic Rtl Design Engineer jobs in Seattle, WA, the most frequently searched job titles are:

What job categories do people searching Freelance Asic Rtl Design Engineer jobs in Seattle, WA look for?

The top searched job categories for Freelance Asic Rtl Design Engineer jobs in Seattle, WA are:

New Graduate Engineer, Silicon Engineering

SpaceX

Redmond, WA

$145K - $200K/yr

Full-time

Medical, Dental, Vision, Life, Retirement, PTO

Posted 19 days ago


SpaceX rating

8.7

Company rating: 8.7 out of 10

Based on 150 frontline employees who took The Breakroom Quiz

16th of 72 rated aerospace companies


Job description

NEW GRADUATE ENGINEER, SILICON ENGINEERING

Are you an engineering student graduating in fall or this upcoming spring/summer that is looking for full-time employment after graduation? We are looking for engineers to help us develop next generation silicon for SpaceX. The team is hiring engineers from pre-silicon through post-silicon across many disciplines in RF/Analog IC, RTL design, design verification, physical design, DFT, validation and more using state-of-the-art tools and methodologies. The ideal candidate will be a hands-on self-starter who can execute the steps required to fully design and verify complex designs.

Full-time employment is available working on our Starlink program in Palo Alto (CA), Irvine (CA), or Redmond (WA). 

RESPONSIBILITIES:

  • ASIC/FPGA Design & Verification
    • Participate in all phases of ASIC/FPGA design and verification flows
    • Contribute towards design architecture, RTL implementation and/or verification, and emulation
    • Bring-up and validate ASICs and FPGAs in the lab (write embedded software using C/C++ and/or Python)
    • Hands-on self-starter who can execute the steps required to fully verify a complex digital design
  • RF/Analog IC Design
    • Simulate and model RFIC systems at high level and work with system architects, modem/DSP and ASIC engineers to partition functions between hardware and software domains
    • Derive specifications for the RFIC subsystems and circuits
    • Develop RF/microwave circuits in state-of-the-art SiGe or CMOS processes
    • Perform IC floor planning and layout
  • Digital Signal Processing
    • Develop RTL designs using SystemVerilog, with emphasis on DSP and digital communication system blocks (frontend, physical layer, link layer, error correction, etc.)
    • Verify DSP blocks against fixed-point MATLAB model, work in collaboration with systems engineers
  • Physical Design
    • Perform synthesis and physical implementation steps (synthesis, floor planning, place and route, timing/noise analysis, physical verification, electromigration, voltage drop, logic equivalency and other signoff checks)
    • Develop/improve physical design methodologies and automation scripts for various implementation steps
    • Participate in silicon tapeouts in advanced technology nodes for future Starlink SOCs

BASIC QUALIFICATIONS:

  • Graduating with a bachelor's degree, master's degree or PhD in 2026 or 2027
  • Bachelor's degree in an engineering discipline, mathematics or physics
  • Experience working with ASIC, SOC, FPGA, RFIC, or MMIC

PREFERRED SKILLS AND EXPERIENCE:

  • Understanding of computer architecture
  • Experience in one or more of the following areas:
    • Analog or digital CMOS integrated circuit design and/or physical design
    • SystemVerilog, Verilog, VHDL or C/C++
    • Scripting languages, e.g. Python for automation
    • Object-oriented programming
    • Simulation tools such as ADS, Spectre, HFSS or Momentum
    • RTL design, chip bring-up, verification, and/or post-silicon validation experience
    • Digital signal processing

ADDITIONAL REQUIREMENTS: 

  • Ability to work extended hours and weekends as necessary to meet critical project milestones
COMPENSATION AND BENEFITS:
Pay Range:
Level 1: $125,000.00 - $165,000.00
Level 2: $145,000.00 - $200,000.00

Your actual level and base salary will be determined on a case-by-case basis and may vary based on the following considerations: job-related knowledge and skills, education, and experience.

Base salary is just one part of your total rewards package at SpaceX. You may also be eligible for long-term incentives, in the form of company stock or long-term cash awards, as well as potential discretionary bonuses and the ability to purchase additional stock at a discount through an Employee Stock Purchase Plan. You will also receive access to comprehensive medical, vision, and dental coverage, access to a 401(k) retirement plan, short and long-term disability insurance, life insurance, paid parental leave, and various other discounts and perks. You may also accrue 3 weeks of paid vacation and will be eligible for 10 or more paid holidays per year. Employees in Washington State accrue paid sick time in compliance with state and federal law. Company shuttles are offered to employees for roundtrip travel from select Seattle locations to the SpaceX Redmond office Monday to Friday.


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About SpaceX

Sourced by ZipRecruiter

Industry

Aerospace product and parts manufacturing, data services, guided missile and space vehicle manufacturing and satellite telecommunications

Company size

1,001 - 5,000 Employees

Headquarters location

Hawthorne, CA, US