Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You ... Learn and run RTL checks to ensure design quality (e.g., cross clock domains (CDC), clocks, reset ...
Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You ... Learn and run RTL checks to ensure design quality (e.g., cross clock domains (CDC), clocks, reset ...
You are an experienced RTL design engineer with a passion for complex processor systems and interconnect architecture. You bring deep technical expertise, a structured problem-solving approach, and ...
You are an experienced RTL design engineer with a passion for complex processor systems and interconnect architecture. You bring deep technical expertise, a structured problem-solving approach, and ...
TITLE :- System IP/RTL Design Engineer LOCATION Austin, TX (Onsite) DURATION 6+ Months (May get extend) MODE OF INTERVIEW Onsite RATE $90 per hour on W2 Key responsibilities include: * Work on RTL ...
TITLE :- System IP/RTL Design Engineer LOCATION Austin, TX (Onsite) DURATION 6+ Months (May get extend) MODE OF INTERVIEW Onsite RATE $90 per hour on W2 Key responsibilities include: * Work on RTL ...
GPU Design Engineer
Austin, TX · On-site
Provide hands-on technical leadership across RTL design and design verification, including ... Extensive experience delivering complex GPU, CPU, and/or ASIC designs from micro-architecture ...
GPU Design Engineer
Austin, TX · On-site
Provide hands-on technical leadership across RTL design and design verification, including ... Extensive experience delivering complex GPU, CPU, and/or ASIC designs from micro-architecture ...
Design Engineering Architect
Austin, TX · On-site
Guide and mentor a team of RTL design engineers, fostering a collaborative and innovative environment. Design & Microarchitecture: Define and develop microarchitectural features for IPs and ...
Design Engineering Architect
Austin, TX · On-site
Guide and mentor a team of RTL design engineers, fostering a collaborative and innovative environment. Design & Microarchitecture: Define and develop microarchitectural features for IPs and ...
Design Engineering Architect
Austin, TX · On-site
Guide and mentor a team of RTL design engineers, fostering a collaborative and innovative environment. Design & Microarchitecture: Define and develop microarchitectural features for IPs and ...
Design Engineering Architect
Austin, TX · On-site
Guide and mentor a team of RTL design engineers, fostering a collaborative and innovative environment. Design & Microarchitecture: Define and develop microarchitectural features for IPs and ...
Senior CPU RTL Design Engineer
Austin, TX · On-site
Medical
Retirement
PTO
As a CPU RTL Logic Design Engineer your responsibilities will include but are not limited to: Collaborates, drives and develops logic design, register transfer level (RTL) coding, and simulation for ...
Senior CPU RTL Design Engineer
Austin, TX · On-site
Medical
Retirement
PTO
As a CPU RTL Logic Design Engineer your responsibilities will include but are not limited to: Collaborates, drives and develops logic design, register transfer level (RTL) coding, and simulation for ...
Senior Staff Verification Engineer
Austin, TX · On-site
$134K - $164K/yr
Prodapt's ASIC Services is a leading provider of SoC/ASIC RTL Design, UVM based verification ... As a Senior Staff System IP Design Verification engineer you will contribute to the functional ...
Senior Staff Verification Engineer
Austin, TX · On-site
$134K - $164K/yr
Prodapt's ASIC Services is a leading provider of SoC/ASIC RTL Design, UVM based verification ... As a Senior Staff System IP Design Verification engineer you will contribute to the functional ...
Design Engineer III
Austin, TX · On-site
Job Title: Core Engineering - Design Engineer III Duration: 12 months with possible extension ... Minimum Qualifications Demonstrated experience with RTL-to-GDSII design flow usage and development ...
Design Engineer III
Austin, TX · On-site
Job Title: Core Engineering - Design Engineer III Duration: 12 months with possible extension ... Minimum Qualifications Demonstrated experience with RTL-to-GDSII design flow usage and development ...
As an ASIC Engineer specializing in architecture, performance and modeling, you will define and ... Collaborate with architecture, RTL design, and physical design teams to translate performance ...
As an ASIC Engineer specializing in architecture, performance and modeling, you will define and ... Collaborate with architecture, RTL design, and physical design teams to translate performance ...
As an ASIC Engineer specializing in architecture, performance and modeling, you will define and ... Collaborate with architecture, RTL design, and physical design teams to translate performance ...
As an ASIC Engineer specializing in architecture, performance and modeling, you will define and ... Collaborate with architecture, RTL design, and physical design teams to translate performance ...
SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... RTL design, chip bring-up, and post-silicon validation experience * Ability to work in a dynamic ...
SR. ASIC DESIGN VERIFICATION ENGINEER (SILICON ENGINEERING) At SpaceX we're leveraging our ... RTL design, chip bring-up, and post-silicon validation experience * Ability to work in a dynamic ...
Job Title: Core Engineering - Design Engineer III Duration: 12 months with possible extension ... Minimum Qualifications Demonstrated experience with RTL-to-GDSII design flow usage and development ...
Job Title: Core Engineering - Design Engineer III Duration: 12 months with possible extension ... Minimum Qualifications Demonstrated experience with RTL-to-GDSII design flow usage and development ...
As an ASIC Engineer specializing in performance and modeling, you will define and drive the ... Collaborate with architecture, RTL design, and physical design teams to translate performance ...
As an ASIC Engineer specializing in performance and modeling, you will define and drive the ... Collaborate with architecture, RTL design, and physical design teams to translate performance ...
Senior CPU RTL Design Engineer
Austin, TX · On-site
Medical
Retirement
PTO
As a CPU RTL Logic Design Engineer your responsibilities will include but are not limited to: • Collaborates, drives and develops logic design, register transfer level (RTL) coding, and simulation ...
Senior CPU RTL Design Engineer
Austin, TX · On-site
Medical
Retirement
PTO
As a CPU RTL Logic Design Engineer your responsibilities will include but are not limited to: • Collaborates, drives and develops logic design, register transfer level (RTL) coding, and simulation ...
Senior ASIC Physical Design Engineer
Austin, TX · On-site
$165K - $241K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Your Impact As a Physical Design Engineer, you will play a key role in the full RTL-to-GDSII ... Own and drive RTL-to-GDSII implementation for advanced nodes (sub-16nm to 3nm). * Define and ...
Senior ASIC Physical Design Engineer
Austin, TX · On-site
$165K - $241K/yr
Medical
Dental
Vision
Life
Retirement
PTO
Your Impact As a Physical Design Engineer, you will play a key role in the full RTL-to-GDSII ... Own and drive RTL-to-GDSII implementation for advanced nodes (sub-16nm to 3nm). * Define and ...
Design Engineer III
Austin, TX · On-site
$120K/yr
Design Engineer III ONSITE- US: TX- Austin OR Sunnyvale office (2nd option) Salary 140 to 145K ... Minimum Qualifications Demonstrated experience with RTL-to-GDSII design flow usage and development ...
Quick apply
Design Engineer III
Austin, TX · On-site
$120K/yr
Design Engineer III ONSITE- US: TX- Austin OR Sunnyvale office (2nd option) Salary 140 to 145K ... Minimum Qualifications Demonstrated experience with RTL-to-GDSII design flow usage and development ...
ASIC Design Engineer
Austin, TX · On-site
$130 - $210/hr
We're looking for ASIC design engineers to contribute to and own blocks in the development of the A-0 and A-1 wafer products, across both the XPU, memory chiplet and other dies on the wafer. Ideal ...
New
ASIC Design Engineer
Austin, TX · On-site
$130 - $210/hr
We're looking for ASIC design engineers to contribute to and own blocks in the development of the A-0 and A-1 wafer products, across both the XPU, memory chiplet and other dies on the wafer. Ideal ...
New
The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible ... Experience in RTL design (Verilog), verification and logic synthesis. * Strong coding skills in ...
The clocks group is looking for a top-notch ASIC engineer to join the team. The Team is responsible ... Experience in RTL design (Verilog), verification and logic synthesis. * Strong coding skills in ...
Digital Design Engineer focusing on high-performance analog-to-digital and digital-to-analog converters. Job responsibilities include RTL design, verification, behavioral modelling, support and ...
Quick apply
Digital Design Engineer focusing on high-performance analog-to-digital and digital-to-analog converters. Job responsibilities include RTL design, verification, behavioral modelling, support and ...
Freelance Asic Rtl Design Engineer information
See Austin, TX salary details
$23.32 is the 25th percentile. Wages below this are outliers.
$14.77 - $25.34
31% of jobs
The median wage is $31.86 / hr.
$25.34 - $35.91
31% of jobs
$35.91 - $46.48
4% of jobs
$55.73 is the 75th percentile. Wages above this are outliers.
$46.48 - $57.05
10% of jobs
$57.05 - $67.63
9% of jobs
$67.63 - $78.20
5% of jobs
$78.20 - $88.77
0% of jobs
$88.77 - $99.34
8% of jobs
$99.34 - $109.91
0% of jobs
$109.91 - $120.48
0% of jobs
$120.48 - $131.05
1% of jobs
$14
$47
$131
How much do freelance asic rtl design engineer jobs pay per hour?
As of Aug 12, 2026, the average hourly pay for freelance asic rtl design engineer in Austin, TX is $47.29, according to ZipRecruiter salary data. Most workers in this role earn between $24.09 and $61.25 per hour, depending on experience, location, and employer.
How much does a Freelance ASIC RTL Design Engineer make?
Freelance ASIC RTL Design Engineers typically earn between $50 and $150 per hour, depending on experience, project complexity, and location. Rates can vary based on expertise in hardware description languages like Verilog or VHDL and familiarity with FPGA or ASIC design tools.
Are freelance ASIC RTL design engineers in demand?
Freelance ASIC RTL design engineers are in demand due to the growing need for custom chip development in industries like telecommunications, AI, and consumer electronics. Skills in hardware description languages such as Verilog or VHDL, along with experience in FPGA prototyping, enhance employability in this competitive field.
What are the most commonly searched types of Asic Rtl Design Engineer jobs in Austin, TX? The most popular types of Asic Rtl Design Engineer jobs in Austin, TX are:
What are popular job titles related to Freelance Asic Rtl Design Engineer jobs in Austin, TX? For Freelance Asic Rtl Design Engineer jobs in Austin, TX, the most frequently searched job titles are:
What job categories do people searching Freelance Asic Rtl Design Engineer jobs in Austin, TX look for? The top searched job categories for Freelance Asic Rtl Design Engineer jobs in Austin, TX are:
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Full-time
Re-posted 20 days ago
Nvidia rating
9.6
Based on 17 frontline employees who took The Breakroom Quiz
7th of 243 rated software companies
Job description
NVIDIA has been redefining computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's motivated by great technology-and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent. As an NVIDIAN, you'll be immersed in a diverse, supportive environment where everyone is inspired to do their best work. Come join the team and see how you can make a lasting impact on the world.
Join the NVIDIA System-On-Chip (SOC) group as an ASIC Design Engineer and make a broad impact. You will focus on improving methodologies and delivering system-level IP to measure performance across multiple projects.
What you'll be doing:
Be an integral part of the team defining, developing, and delivering system-level methodologies and RTL to measure performance on the industry's leading GPUs and SOCs.
Learn and contribute to the development and automation of flows and methodologies to efficiently build, deliver, and support a system-level IP.
Support projects by applying the performance monitoring system under the guidance of senior engineers.
Learn and run RTL checks to ensure design quality (e.g., cross clock domains (CDC), clocks, reset, latency, and more).
Design and implement RTL features (microarchitecture and RTL) with mentorship from experienced engineers.
Work with architects, designers, and software engineers to accomplish your tasks.
What we need to see:
Bachelor's or Master's degree in Electrical or Computer Engineering (or equivalent experience).
Strong academic background in digital design and computer architecture.
Programming experience in Python or other scripting languages.
Knowledge of RTL design (Verilog) and digital design concepts.
Understanding of basic SOC architecture concepts.
Excellent problem-solving and analytical skills.
Proven teamwork and communication across multiple teams.
NVIDIA is widely considered to be the leader of AI computing, and one of the technology world's most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you're creative and autonomous, we want to hear from you.
Your base salary will be determined based on your location, experience, and the pay of employees in similar positions. The base salary range is 116,000 USD - 189,750 USD for Level 2, and 136,000 USD - 218,500 USD for Level 3.You will also be eligible for equity and benefits.
This posting is for an existing vacancy.
NVIDIA uses AI tools in its recruiting processes.
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. As we highly value diversity in our current and future employees, we do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status or any other characteristic protected by law.
About Nvidia
Sourced by ZipRecruiter
NVIDIA has been transforming computer graphics, PC gaming, and accelerated computing for more than 25 years. It's a unique legacy of innovation that's fueled by great technology--and amazing people. Today, we're tapping into the unlimited potential of AI to define the next era of computing. An era in which our GPU acts as the brains of computers, robots, and self-driving cars that can understand the world. Doing what's never been done before takes vision, innovation, and the world's best talent.
Industry
Computer and electronic product manufacturing
Company size
10,000+ Employees
Headquarters location
Santa Clara, CA, US
Year founded
1993