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Asic Development Engineer Jobs in Austin, TX (NOW HIRING)

As an ASIC Engineer specializing in architecture, performance and modeling, you will define and ... ASICs, including development of cycle-accurate and transaction-level simulation environments

Principal ASIC Design Engineer

Austin, TX · On-site

$180K - $220K/yr

Join a world-class team of scientists, engineers, and business professionals to advance the ... Atom Computing is seeking a Principal ASIC Designer to oversee the development of critical ...

As an ASIC Engineer specializing in architecture, performance and modeling, you will define and ... ASICs, including development of cycle-accurate and transaction-level simulation environments

As an ASIC Engineer specializing in performance and modeling, you will define and drive the ... development of cycle-accurate and transaction-level simulation environments * Drive ...

ASIC Engineer, Power

Austin, TX · On-site +1

$146K/yr

As an ASIC Engineer specializing in power on the EDA Infrastructure team, you will develop and ... Evaluate and integrate commercial and internally developed EDA tools into the power analysis flow ...

New

As a Design Verification Engineer, you will be part of an agile team working with experienced ... Track record of 'first-pass success' in ASIC development cycles * Experience with micro ...

Meta is hiring ASIC Design Verification Engineer within the Infrastructure organization. We are ... Experience in development of Universal Verification Methodology (UVM) based verification ...

Design Verification Engineer - ASIC IP Company: Ericsson Silicon Location: Austin, Texas This is an ... development center dedicated to driving excellence in 5G network products. Our ASICs are the ...

New

At Cornelis we're building the future of AI and HPC networking with an AI-first approach to silicon and software development. We're seeking engineers who are energized by working on cutting-edge ASIC ...

At Cornelis we're building the future of AI and HPC networking with an AI-first approach to silicon and software development. We're seeking engineers who are energized by working on cutting-edge ASIC ...

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Showing results 1-20

Asic Development Engineer information

See Austin, TX salary details

$48.6K

$95.3K

$152.2K

How much do asic development engineer jobs pay per year?

As of Jul 30, 2026, the average yearly pay for asic development engineer in Austin, TX is $95,309.00, according to ZipRecruiter salary data. Most workers in this role earn between $78,800.00 and $105,600.00 per year, depending on experience, location, and employer.

What engineer makes $500,000 a year?

An experienced ASIC Development Engineer working in high-demand sectors such as semiconductor design or advanced chip development can earn $500,000 or more annually, especially with seniority, specialized skills, and in competitive markets. Compensation often includes base salary, bonuses, and stock options, particularly in large tech or semiconductor companies.

What is the difference between Asic Development Engineer vs FPGA Design Engineer?

AspectAsic Development EngineerFPGA Design Engineer
Required CredentialsBachelor's or Master's in Electrical Engineering, VLSI, or related fields; knowledge of ASIC design toolsBachelor's or Master's in Electrical Engineering, Digital Design; familiarity with FPGA development tools
Work EnvironmentDesigning and verifying custom silicon chips in semiconductor labs or R&D centersDeveloping and testing FPGA-based solutions in hardware labs or embedded systems environments
Industry UsageUsed in semiconductor companies, integrated circuit design firms, and tech giantsCommon in telecommunications, aerospace, and embedded systems industries

While both roles involve digital hardware design, Asic Development Engineers focus on creating custom chips for high-performance applications, whereas FPGA Design Engineers work on programmable hardware solutions. Both require strong digital design skills and familiarity with hardware description languages, but their end products and development environments differ.

What engineers make $300,000 a year?

Senior engineers in high-demand fields such as software engineering, data engineering, and ASIC development can earn $300,000 or more annually, especially with extensive experience, specialized skills, and working in competitive industries or companies. Roles like senior hardware or ASIC design engineers often reach this level with advanced technical expertise and leadership responsibilities.

Are ASIC engineers in demand?

ASIC development engineers are in high demand due to the growth of industries like consumer electronics, telecommunications, and automotive systems that require custom integrated circuits. Skills in hardware description languages such as VHDL or Verilog, along with experience in FPGA prototyping and verification, enhance employability in this field.

How much do ASIC engineers make?

ASIC development engineers typically earn between $80,000 and $150,000 annually, depending on experience, location, and company size. Senior engineers with specialized skills in hardware description languages and verification tools can earn higher salaries, often exceeding $150,000.
What are popular job titles related to Asic Development Engineer jobs in Austin, TX? For Asic Development Engineer jobs in Austin, TX, the most frequently searched job titles are:
What job categories do people searching Asic Development Engineer jobs in Austin, TX look for? The top searched job categories for Asic Development Engineer jobs in Austin, TX are:
What cities near Austin, TX are hiring for Asic Development Engineer jobs? Cities near Austin, TX with the most Asic Development Engineer job openings:

ASIC Engineer, Architecture

Meta

Austin, TX

$114K/yr

Full-time

Posted 22 days ago


Meta rating

7.8

Company rating: 7.8 out of 10

Based on 45 frontline employees who took The Breakroom Quiz

137th of 246 rated software companies


Job description

Meta's Silicon Engineering organization is building custom silicon solutions that power the infrastructure underpinning Meta's AI and data center workloads at scale. As an ASIC Engineer specializing in architecture, performance and modeling, you will define and drive the architectural performance analysis, pre-silicon modeling, and microarchitectural exploration of custom ASICs designed for Meta's infrastructure. In this role, you will establish functional and performance modeling methodologies and long-term silicon roadmap strategy, as well as develop and analyze workloads, partnering with architecture, design, and software teams to ensure Meta's infrastructure silicon meets the demanding throughput, latency, and efficiency targets required at hyperscale.
ASIC Engineer, Architecture Responsibilities:
  • Drive microarchitectural exploration and trade-off analysis across compute, memory subsystem, interconnect, and I/O domains to inform silicon architecture decisions
  • Define and own the performance modeling strategy for custom infrastructure ASICs, including development of cycle-accurate and transaction-level simulation environments
  • Develop and maintain C++ models of AI chip IPs and subsystems for architecture exploration, performance analysis, and software development
  • Develop low-level workloads and kernels for machine learning training and inference applications
  • Establish performance analysis methodologies, benchmarking frameworks, and bottleneck identification techniques across the full ASIC pipeline
  • Collaborate with architecture, RTL design, and physical design teams to translate performance requirements into implementable microarchitectural specifications
  • Partner with software and systems teams to co-optimize workload scheduling, firmware, and driver behavior against silicon performance characteristics
  • Lead cross-functional technical reviews and communicate performance modeling results and architectural recommendations to engineering leadership
  • Define long-term performance modeling infrastructure roadmaps, including tooling, automation, and simulation platform investments
  • Mentor other engineers on performance modeling techniques, simulation methodology, and microarchitectural analysis best practices
  • Identify and resolve performance gaps between modeled and measured silicon behavior through structured root-cause analysis and model calibration

Minimum Qualifications:
  • Currently has, or is in the process of obtaining a Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta
  • Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience
  • 2+ years of experience in ASIC design, silicon engineering, or a related technical field
  • Proficiency in C++ and Python for developing simulation models, automation frameworks, and performance analysis tools
  • Experience in ASIC performance modeling, microarchitectural analysis, or pre-silicon simulation for custom silicon or SoC designs
  • Experience with the performance analysis of data center, AI accelerator, or high-performance computing workloads on custom silicon
  • Experience developing cycle-accurate or transaction-level performance models using C++ and SystemC for complex digital systems, including processors, memory subsystems, or high-speed interconnects
  • Experience defining microarchitectural specifications and driving cross-functional alignment across architecture, RTL, and physical design teams
  • Experience with assembly programming languages, and with compiler technologies

Preferred Qualifications:
  • Experience developing Python-based automation pipelines for simulation orchestration, regression testing, and performance data analysis
  • Experience writing and optimizing compute/collective kernels in CUDA or equivalent GPU programming frameworks
  • Familiarity with post-silicon performance validation and model-to-hardware correlation methodologies
  • Experience with AI numerics, data types, math functions, and precision/accuracy analysis
  • Experience with high-level synthesis, power-performance-area trade-off analysis, or PPA-driven microarchitectural optimization
  • Experience building or scaling performance modeling infrastructure for hyperscale data center ASICs, including network, storage, or AI inference accelerator designs
  • Experience with hardware description languages (e.g., SystemVerilog, VHDL) and simulation environments used in ASIC development flows

About Meta:
Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology. People who choose to build their careers by building with us at Meta help shape a future that will take us beyond what digital connection makes possible today—beyond the constraints of screens, the limits of distance, and even the rules of physics.
Meta is proud to be an Equal Employment Opportunity and Affirmative Action employer. We do not discriminate based upon race, religion, color, national origin, sex (including pregnancy, childbirth, or related medical conditions), sexual orientation, gender, gender identity, gender expression, transgender status, sexual stereotypes, age, status as a protected veteran, status as an individual with a disability, or other applicable legally protected characteristics. We also consider qualified applicants with criminal histories, consistent with applicable federal, state and local law. Meta participates in the E-Verify program in certain locations, as required by law. Please note that Meta may leverage artificial intelligence and machine learning technologies in connection with applications for employment.
Meta is committed to providing reasonable accommodations for candidates with disabilities in our recruiting process. If you need any assistance or accommodations due to a disability, please let us know at accommodations-ext@meta.com.
$114,000/year to $172,000/year + bonus + equity + benefits
Individual compensation is determined by skills, qualifications, experience, and location. Compensation details listed in this posting reflect the base hourly rate, monthly rate, or annual salary only, and do not include bonus, equity or sales incentives, if applicable. In addition to base compensation, Meta offers benefits. Learn more about benefits at Meta.

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