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Entry Level Memory Design Engineer Jobs (NOW HIRING)

Micron

Staff Design Engineer - DEG Design

Boise, ID · On-site

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and ...

Apple

ASIC Design Engineer

Santa Clara, CA · On-site

We are searching for a dedicated engineer to join our exciting team of problem solvers. The ideal ... Develop memory hierarchies for high performance parallel computer architectures. (system-on-a-chip ...

Micron

Semiconductor Design Engineer

Richardson, TX · On-site

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the ... Parasitic modeling and assisting in design validation, reticle experiments and required tape-out ...

Apple

ASIC Design Engineer

Santa Clara, CA · On-site

We are searching for a dedicated engineer to join our exciting team of problem solvers. The ideal ... Drive new memory system architectures from DRAM up.Explore architecture and feature trade-offs in ...

Metromont LLC

Design Engineer

Greenville, SC · On-site

Non-Plant Exempt POSITION PURPOSE The Design Engineer is an entry-level position where associates are heavily supervised and are expected to learn and assist with all engineering design aspects of a ...

Apple

ASIC Design Engineer

Santa Clara, CA · On-site

We are searching for a dedicated engineer to join our exciting team of problem solvers. The ideal ... Drive new memory system architectures from DRAM up.Explore architecture and feature trade-offs in ...

SWE Solutions

Design Engineer I

Chicago, IL · On-site

$33 - $48/hr

In this entry-level role, you will collaborate with experienced engineers and designers to develop ... Stay current with advancements in civil engineering design practices, tools, and regulations.

SWE Solutions

Design Engineer I

Chicago, IL · On-site

$33 - $48/hr

Description We are seeking a motivated Civil Design Engineer I to join our team and contribute to ... In this entry-level role, you will collaborate with experienced engineers and designers to develop ...

Apple

ASIC Design Engineer

Santa Clara, CA · On-site

We are searching for a dedicated engineer to join our exciting team of problem solvers. The ideal ... Drive new memory system architectures from DRAM up.Explore architecture and feature trade-offs in ...

AVTC Group

Digital Design Engineer

Tucson, AZ · On-site

$128K/yr

... memory, and industry interfaces, such as PCIe, Ethernet, I2C, SPI, and UART. The candidate will be ... of engineering digital circuit design experience to include at least 2 of the following:

SWE Solutions

Design Engineer I

Chicago, IL · On-site

$33 - $48/hr

We are seeking a motivated Civil Design Engineer I to join our team and contribute to the ... In this entry-level role, you will collaborate with experienced engineers and designers to develop ...

Metromont LLC

Design Engineer

Winchester, VA · On-site

Non-Plant Exempt POSITION PURPOSE The Design Engineer is an entry-level position where associates are heavily supervised and are expected to learn and assist with all engineering design aspects of a ...

Micron Technology

Package Design Engineer

Boise, ID · On-site

$129K/yr

Micron Technology is a world leader in innovating memory and storage solutions that accelerate the ... Parasitic modeling and assisting in design validation, reticle experiments, and required tape-out ...

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All JobsEntry Level Memory Design Engineer Jobs

Entry Level Memory Design Engineer information

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$30K

$69.4K

$118K

How much do entry level memory design engineer jobs pay per year?

As of Jun 21, 2026, the average yearly pay for entry level memory design engineer in the United States is $69,362.00, according to ZipRecruiter salary data. Most workers in this role earn between $51,500.00 and $78,500.00 per year, depending on experience, location, and employer.

What engineer makes $500,000 a year?

Highly experienced memory design engineers or senior semiconductor engineers in specialized fields can earn salaries approaching or exceeding $500,000 annually, especially in senior roles at major tech or chip manufacturing companies. These positions often require advanced skills in VLSI design, extensive industry experience, and sometimes stock options or bonuses as part of compensation packages.

What jobs can DT get you?

An Entry Level Memory Design Engineer can qualify for roles such as digital or analog memory designer, circuit design engineer, or hardware engineer in semiconductor companies. These positions typically require knowledge of VLSI design, simulation tools, and understanding of memory architectures. Career progression may lead to senior design roles, system architect positions, or specialized research roles in memory technology development.

What are the typical responsibilities of an Entry Level Memory Design Engineer during a project cycle?

As an Entry Level Memory Design Engineer, you will typically be involved in tasks such as designing memory circuits, running simulations to verify circuit performance, and assisting with layout planning. You will often work closely with senior engineers to debug and optimize designs, as well as collaborate with verification and testing teams to ensure products meet specifications. Throughout a project cycle, you may also help document design processes and contribute to design reviews, gaining valuable exposure to the full life cycle of integrated circuit development.

What engineers make $300,000 a year?

Senior engineers in specialized fields such as software engineering, petroleum engineering, and certain electrical or hardware engineering roles can earn $300,000 or more annually, especially with experience, advanced skills, and in high-demand industries. Executive or managerial engineering positions may also reach this level of compensation. Compensation varies based on location, company size, and individual expertise.

What are Entry Level Memory Design Engineers?

Entry Level Memory Design Engineers are professionals who assist in designing, developing, and testing memory components such as SRAM, DRAM, and flash memory used in electronic devices. They typically work as part of a larger engineering team, focusing on circuit design, simulations, and verification tasks. These roles are ideal for recent graduates in electrical or computer engineering who are interested in semiconductor technology and low-level hardware design. Entry level engineers receive mentorship from senior engineers and gain hands-on experience with industry-standard design tools and processes.

What are the key skills and qualifications needed to thrive as an Entry Level Memory Design Engineer, and why are they important?

To thrive as an Entry Level Memory Design Engineer, you need a solid background in electrical engineering or a related field, with strong knowledge of digital and analog circuit design fundamentals. Familiarity with industry-standard EDA tools like Cadence or Synopsys, as well as basic programming skills in languages such as Verilog or VHDL, is typically required. Attention to detail, problem-solving ability, and effective teamwork are crucial soft skills for this role. These skills ensure precise and innovative memory circuit designs that meet performance, power, and reliability requirements in semiconductor products.

What is the salary of memory layout Design Engineer?

The salary of an entry-level memory layout design engineer typically ranges from $70,000 to $100,000 annually, depending on location, company, and candidate experience. Compensation may also include benefits such as bonuses and stock options, and requires knowledge of EDA tools and digital design principles.
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Entry Level Memory Design Engineer jobs near you
Infographic showing various Entry Level Memory Design Engineer job openings in the United States as of June 2026, with employment types broken down into 93% Full Time, and 7% Part Time. Highlights an 87% Physical, 5% Hybrid, and 8% Remote job distribution, with an average salary of $69,362 per year, or $33.3 per hour.
DFT Design Engineer

DFT Design Engineer

Advanced Micro Devices, Inc

Boxborough, MA • On-site

$126K/yr

Full-time

Posted 9 days ago

Advanced Micro Devices rating

8.4

Company rating: 8.4 out of 10

Based on 7 frontline employees who took The Breakroom Quiz

22nd of 139 rated electronics manufacturers

Job description

WHAT YOU DO AT AMD CHANGES EVERYTHING
At AMD, our mission is to build great products that accelerate next-generation computing experiences-from AI and data centers, to PCs, gaming and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity and a shared passion to create something extraordinary. When you join AMD, you'll discover the real differentiator is our culture. We push the limits of innovation to solve the world's most important challenges-striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
THE ROLE:
As a Design-for-Testability (DFT) Engineer at AMD, you will own the full DFT lifecycle-from specification definition through post-silicon bring-up-to ensure robust and efficient test solutions. You will collaborate closely with Architects, Verification Engineers, Physical Designers, CAD Engineers, SoC Design Engineers, Product Engineers, and Program Management to deliver successful and timely project outcomes.
THE PERSON:
As part of AMD's Strategic Silicon Solutions (S3) Business Unit, you will help bring customer-specific design requirements to life across a wide range of products, including tablets, gaming consoles, servers, and more. You thrive in a collaborative team environment, take ownership of tasks through to completion, and communicate effectively both verbally and in writing.
KEY RESPONSIBILITIES:
  • Implement and verify DFT and Design-for-Debug (DFD) architectures and features.
  • Insert Scan, JTAG, and Boundary Scan chains; generate ATPG patterns.
  • Generate, implement, and verify Memory Built-In Self-Test (BIST) logic.
  • Apply low power DFT techniques to designs.
  • Achieve DFT timing closure and verify ATPG patterns through gate-level simulation with timing.
  • Analyze test coverage and work on reducing test costs.
  • Provide post-silicon support to ensure successful bring-up and improve yield learning.

PREFERRED EXPERIENCE:
  • Strong understanding of Design For Test methodologies and DFT verification (e.g., IEEE1500, JTAG 1149.x, scan, memory BIST).
  • Experience with Tessent TestKompress and Silicon Scan Network (SSN).
  • Proficiency with VCS simulation tools, Perl/Shell scripting, and Verilog RTL design.
  • Exposure to static timing analysis and timing closure processes.
  • Experience in pre-silicon test planning, validation, and engagement with design teams.
  • Skilled in characterization and debugging of scan/ATPG tests in new silicon designs and process technologies.
  • Expertise in optimizing test flows for quality enhancement and cost reduction.
  • Ability to analyze part failures to improve test coverage and yield.
  • Experience analyzing characterization data across process, voltage, and temperature (PVT) corners.
  • Excellent communication skills and ability to work effectively in a global team environment.
  • Knowledge of low power design concepts such as clock gating and power gating is a plus.

ACADEMIC CREDENTIALS:
  • Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, or a related field.

LOCATIONS: Boxborough, MA, Austin, TX, and Markham, ON
This role is not eligible for Visa Sponsorship.
#LI-LC3
#LI-HYBRID
#LI-Hybrid
Benefits offered are described: AMD benefits at a glance.
AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
AMD may use Artificial Intelligence to help screen, assess or select applicants for this position. AMD's "Responsible AI Policy" is available here.
This posting is for an existing vacancy.

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